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authorIlias Apalodimas <[email protected]>2025-06-18 09:58:12 +0300
committerTom Rini <[email protected]>2025-06-27 11:48:20 -0600
commitb56c0632ad62415a40216d6f4de850e870163a6f (patch)
tree81599ccafe0a11b2f7549f48ed9064d29efacee1 /include
parentb1d017afda2bf5b88736528ee54d32f6e51b7bf2 (diff)
nxp: Prepare macros for KVM changes
A following patch is replacing our IO accessors with do { ... } while(0) ones in order to make them usable with KVM. That leads to an error eventually looking like this: arch/arm/include/asm/io.h:62:9: error: expected expression before 'do' 62 | do { \ | ^~ arch/arm/include/asm/io.h:211:41: note: in expansion of macro '__raw_writel' 211 | #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) | ^~~~~~~~~~~ arch/arm/include/asm/io.h:223:25: note: in expansion of macro 'out_arch' 223 | #define out_be32(a,v) out_arch(l,be32,a,v) | ^~~~~~~~ drivers/spi/fsl_dspi.c:127:17: note: in expansion of macro 'out_be32' 127 | out_be32(addr, val) : out_le32(addr, val); | ^~~~~~~~ So adjust the current macros and code to be compatible with the upcoming change. Signed-off-by: Ilias Apalodimas <[email protected]> Reviewed-by: Tom Rini <[email protected]>
Diffstat (limited to 'include')
-rw-r--r--include/fsl_ifc.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index 3ac22687930..1c363115beb 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -803,29 +803,29 @@ void init_final_memctl_regs(void);
((struct fsl_ifc_fcm *)CFG_SYS_IFC_ADDR)
#define get_ifc_cspr_ext(i) \
- (ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr_ext))
+ ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr_ext)
#define get_ifc_cspr(i) \
- (ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr))
+ ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr)
#define get_ifc_csor_ext(i) \
- (ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor_ext))
+ ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor_ext)
#define get_ifc_csor(i) \
- (ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor))
+ ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor)
#define get_ifc_amask(i) \
- (ifc_in32(&(IFC_FCM_BASE_ADDR)->amask_cs[i].amask))
+ ifc_in32(&(IFC_FCM_BASE_ADDR)->amask_cs[i].amask)
#define get_ifc_ftim(i, j) \
- (ifc_in32(&(IFC_FCM_BASE_ADDR)->ftim_cs[i].ftim[j]))
+ ifc_in32(&(IFC_FCM_BASE_ADDR)->ftim_cs[i].ftim[j])
#define set_ifc_cspr_ext(i, v) \
- (ifc_out32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr_ext, v))
+ ifc_out32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr_ext, v)
#define set_ifc_cspr(i, v) \
- (ifc_out32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr, v))
+ ifc_out32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr, v)
#define set_ifc_csor_ext(i, v) \
- (ifc_out32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor_ext, v))
+ ifc_out32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor_ext, v)
#define set_ifc_csor(i, v) \
- (ifc_out32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor, v))
+ ifc_out32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor, v)
#define set_ifc_amask(i, v) \
- (ifc_out32(&(IFC_FCM_BASE_ADDR)->amask_cs[i].amask, v))
+ ifc_out32(&(IFC_FCM_BASE_ADDR)->amask_cs[i].amask, v)
#define set_ifc_ftim(i, j, v) \
- (ifc_out32(&(IFC_FCM_BASE_ADDR)->ftim_cs[i].ftim[j], v))
+ ifc_out32(&(IFC_FCM_BASE_ADDR)->ftim_cs[i].ftim[j], v)
enum ifc_chip_sel {
IFC_CS0,