diff options
| author | Alif Zakuan Yuslaimi <[email protected]> | 2025-08-03 18:24:44 -0700 |
|---|---|---|
| committer | Tien Fong Chee <[email protected]> | 2025-08-08 22:20:50 +0800 |
| commit | c8f5166cff0ccdb1966ed786dba88e9548ce632e (patch) | |
| tree | 51a7980a4ce504306ad5af9e2f166fa0813ab688 /include | |
| parent | 3a1cd4ffd7483465bf24539e9ba94f92dd17cd5d (diff) | |
sysreset: socfpga: soc64: Enable L2 reset
Put all slave CPUs (CPU1-3) into WFI mode. Master CPU (CPU0) writes
the magic word into system manager's scratch register to indicate
the system has performed L2 reset and request reset manager to
perform hardware handshake and then trigger L2 reset. CPU0 put
itself into WFI mode. L2 reset will reboot all HPS CPU cores after
which all HPS cores are in WFI mode. L2 reset is followed by warm
reset request by SPL via RMR_EL3 system register.
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/socfpga_soc64_common.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index e48673e6151..8755532ea82 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -19,6 +19,15 @@ #define CPU_RELEASE_ADDR 0xFFD12210 /* + * Share sysmgr.boot_scratch_cold6 & 7 (64bit) with VBAR_LE3_BASE_ADDR + * Indicate L2 reset is done. HPS should trigger warm reset via RMR_EL3. + */ +#define L2_RESET_DONE_REG 0xFFD12218 + +/* Magic word to indicate L2 reset is completed */ +#define L2_RESET_DONE_STATUS 0x1228E5E7 + +/* * U-Boot console configurations */ |