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authorTom Rini <[email protected]>2025-04-28 09:34:32 -0600
committerTom Rini <[email protected]>2025-04-28 12:45:45 -0600
commitd2eef3a4a715a579d4a026e3be20aa1098d50a9f (patch)
tree9b26c941f2aad3cf621ebbb4342559223f01fdfe /include
parent6f4bd8edb8c7c8061e05dc78821d939576ca6e15 (diff)
parent85e9882a17fe111fcb5cb563e673a6b46814044c (diff)
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
We have improvements to the reliability of H6 and H616 DRAM initialisation, hopefully avoiding those occasional size misdetections many people reported before. Also there is some modernisation of the USB PHY code, to use DT provided regulators and GPIOs, instead of relying on this being badly duplicated in Kconfig. This also happens to fix broken USB operations for older boards (using the A20 SoCs, for instance), which were clashing over grabbing some GPIOs, leading to a driver bailout. There is also some rework of the H6/H616 SPL clock code, to prepare it for being reused by the upcoming Allwinner A523 support. This drops the usage of C structs to model MMIO register frames, and replaces them by using an addition of the base address with a macro defined offset. Also in preparation for A523 there is one fix and one addition for the FEL code, to prepare for the GICv3 interrupt controller that the new SoC uses. And since this is a simple fix, and was ready, there is also the watchdog driver for that new SoC. Finally tossing in an easy fix to some H616 defconfig files to enable eMMC. I also use the opportunity to enable proper page table protection (observing read-only and no-execute attributes), support for which the arm64 port recently gained. I didn't spot any issues on my arm64 board tests, but it can be easily disabled or backed out again in case any issues arise. Full support for the two new SoC series (A133 and A523) we are working on is not quite ready yet, but might follow still a bit later if progress permits. CI passed, and boot-tested on at least one board with a H616, H6, A64, H3, A20, T113s.
Diffstat (limited to 'include')
-rw-r--r--include/axp221.h4
-rw-r--r--include/axp809.h4
-rw-r--r--include/axp818.h4
-rw-r--r--include/sunxi_gpio.h8
4 files changed, 0 insertions, 20 deletions
diff --git a/include/axp221.h b/include/axp221.h
index 32b988f3a9c..8a4a3cca82f 100644
--- a/include/axp221.h
+++ b/include/axp221.h
@@ -53,10 +53,6 @@
#ifdef CONFIG_AXP221_POWER
#define AXP_POWER_STATUS 0x00
#define AXP_POWER_STATUS_ALDO_IN BIT(0)
-#define AXP_VBUS_IPSOUT 0x30
-#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2)
-#define AXP_MISC_CTRL 0x8f
-#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4)
#define AXP_GPIO0_CTRL 0x90
#define AXP_GPIO1_CTRL 0x92
#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */
diff --git a/include/axp809.h b/include/axp809.h
index 71a7cb2aaa1..3bd71b3d1a3 100644
--- a/include/axp809.h
+++ b/include/axp809.h
@@ -47,10 +47,6 @@
#ifdef CONFIG_AXP809_POWER
#define AXP_POWER_STATUS 0x00
#define AXP_POWER_STATUS_ALDO_IN BIT(0)
-#define AXP_VBUS_IPSOUT 0x30
-#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2)
-#define AXP_MISC_CTRL 0x8f
-#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4)
#define AXP_GPIO0_CTRL 0x90
#define AXP_GPIO1_CTRL 0x92
#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */
diff --git a/include/axp818.h b/include/axp818.h
index 08ac35d15fa..b3a9686e0e5 100644
--- a/include/axp818.h
+++ b/include/axp818.h
@@ -61,10 +61,6 @@
#ifdef CONFIG_AXP818_POWER
#define AXP_POWER_STATUS 0x00
#define AXP_POWER_STATUS_ALDO_IN BIT(0)
-#define AXP_VBUS_IPSOUT 0x30
-#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2)
-#define AXP_MISC_CTRL 0x8f
-#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4)
#define AXP_GPIO0_CTRL 0x90
#define AXP_GPIO1_CTRL 0x92
#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */
diff --git a/include/sunxi_gpio.h b/include/sunxi_gpio.h
index 122987c395e..12b54c8dda4 100644
--- a/include/sunxi_gpio.h
+++ b/include/sunxi_gpio.h
@@ -82,7 +82,6 @@ enum sunxi_gpio_number {
SUNXI_GPIO_L_START = 352,
SUNXI_GPIO_M_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_L),
SUNXI_GPIO_N_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_M),
- SUNXI_GPIO_AXP0_START = 1024,
};
/* SUNXI GPIO number definitions */
@@ -99,8 +98,6 @@ enum sunxi_gpio_number {
#define SUNXI_GPM(_nr) (SUNXI_GPIO_M_START + (_nr))
#define SUNXI_GPN(_nr) (SUNXI_GPIO_N_START + (_nr))
-#define SUNXI_GPAXP0(_nr) (SUNXI_GPIO_AXP0_START + (_nr))
-
/* GPIO pin function config */
#define SUNXI_GPIO_INPUT 0
#define SUNXI_GPIO_OUTPUT 1
@@ -185,11 +182,6 @@ enum sunxi_gpio_number {
#define SUNXI_GPIO_PULL_UP 1
#define SUNXI_GPIO_PULL_DOWN 2
-/* Virtual AXP0 GPIOs */
-#define SUNXI_GPIO_AXP0_PREFIX "AXP0-"
-#define SUNXI_GPIO_AXP0_VBUS_ENABLE 5
-#define SUNXI_GPIO_AXP0_GPIO_COUNT 6
-
struct sunxi_gpio_plat {
void *regs;
char bank_name[3];