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authorSean Anderson <[email protected]>2026-01-29 13:40:11 -0500
committerMichal Simek <[email protected]>2026-02-13 08:16:25 +0100
commitdf1875ea31df7762d3e4417438f5ff7563e15502 (patch)
treedae54f1a3bce2862714f9189824a24aa01523fb6 /include
parentdf4d85b9d1345a9fb450ef1956cf2d454efd7b1e (diff)
pinctrl: zynqmp: Add SPL support
Although the pinctrl pm requests are implemented in the PMU firmware, PM_QUERY_DATA is actually implemented in ATF. In SPL (or when running in EL3), ATF is not yet running, so we need to implement this API ourselves. Do the bare minimum, allowing SPL to enumerate functions, but don't bother with groups. Groups take up a lot of space, and can be emulated with pins. For example, a node like display-port { mux { groups = "dpaux0_1"; function = "dpaux0"; }; }; can be replaced by display-port { mux { pins = "MIO34", "MIO35", "MIO36", "MIO37"; function = "dpaux0"; }; }; While this isn't backwards-compatible with existing devicetrees, it's more than enough for SPL where we may only need to mux one or two pins. Add SPL_PINCTRL_ZYNQMP to ensure there's no SPL size growth when pinctrl is enabled in U-Boot but isn't necessary for SPL. The only config this would affect is Kria, but SPL_PINCTRL_GENERIC is disabled so SPL_PINCTRL_ZYNQMP is not selected. Signed-off-by: Sean Anderson <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'include')
-rw-r--r--include/zynqmp_firmware.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index 05df49f292a..f5e72625e53 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -185,6 +185,11 @@ enum pm_query_id {
PM_QID_CLOCK_GET_MAX_DIVISOR = 13,
};
+#define NUM_GROUPS_PER_RESP 6
+#define NA_GROUP -1
+#define RESERVED_GROUP -2
+#define MAX_FUNC_NAME_LEN 16
+
enum pm_pinctrl_config_param {
PM_PINCTRL_CONFIG_SLEW_RATE = 0,
PM_PINCTRL_CONFIG_BIAS_STATUS = 1,