diff options
| author | Tom Rini <[email protected]> | 2021-10-06 12:26:33 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2021-10-06 13:46:31 -0400 |
| commit | ea67f467a43e4c8852bd1ce1bb75f5dc6c3788d1 (patch) | |
| tree | 1bbf310f2b22ad465d5698bfdf71347129834561 /include | |
| parent | 7240e1b8f94a56db88a2af688cad27e2e6545302 (diff) | |
| parent | 6115f1c4fe81015369e110ea9830a6e36710677c (diff) | |
Merge branch '2021-10-06-assorted-improvements'
- Use better values for ACPI OEM_VERSION
- Assorted NAND related Kconifg migrations and another dependency fix
Diffstat (limited to 'include')
107 files changed, 9 insertions, 537 deletions
diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 65c16380ee5..73858c56e51 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -95,7 +95,6 @@ /* NAND configuration part */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE 0x0C000000 #endif /* __CONFIG_H */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 922f0661aba..1841eff69c7 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -14,7 +14,6 @@ #include <linux/stringify.h> #include <asm/config_mpc85xx.h> -#define CONFIG_NAND_FSL_IFC #ifdef CONFIG_SDCARD #define CONFIG_SPL_FLUSH_IMAGE @@ -309,10 +308,8 @@ extern unsigned long get_sdram_size(void); | CSOR_NAND_PGS_512 /* Page Size = 512b */ \ | CSOR_NAND_SPRZ_16 /* Spare size = 16 */ \ | CSOR_NAND_PB(32)) /* 32 Pages Per Block */ -#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) #elif defined(CONFIG_TARGET_P1010RDB_PB) -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ @@ -320,7 +317,6 @@ extern unsigned long get_sdram_size(void); | CSOR_NAND_PGS_4K /* Page Size = 4K */ \ | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(128)) /*Pages Per Block = 128 */ -#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) #endif #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 1e75066eb1c..21e56d68f5d 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -159,7 +159,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_RAMBOOT #endif -#define CONFIG_NAND_FSL_ELBC /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC #define CONFIG_SYS_NAND_BASE 0xffa00000 @@ -171,7 +170,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) /* NAND flash config */ #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ @@ -379,7 +377,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (8 * (128 * 1024)) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h index 2f6cc5d8e14..f1417b1bfc1 100644 --- a/include/configs/P3041DS.h +++ b/include/configs/P3041DS.h @@ -9,7 +9,6 @@ */ #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ -#define CONFIG_NAND_FSL_ELBC #define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE3 #define CONFIG_PCIE4 diff --git a/include/configs/P5040DS.h b/include/configs/P5040DS.h index 12666d6ee6f..fc2a07b9741 100644 --- a/include/configs/P5040DS.h +++ b/include/configs/P5040DS.h @@ -9,7 +9,6 @@ */ #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ -#define CONFIG_NAND_FSL_ELBC #define CONFIG_PCIE3 #define CONFIG_FSL_SATA_V2 #define CONFIG_SYS_FSL_RAID_ENGINE diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index e4629946ddb..ef79c1beea5 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -242,7 +242,6 @@ unsigned long get_board_sys_clk(void); #endif /* NAND Flash on IFC */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0xff800000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) @@ -264,7 +263,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_PGS_4K /* Page Size = 4K */ \ | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ -#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) #elif defined(CONFIG_TARGET_T1023RDB) #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ @@ -273,10 +271,8 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_PGS_2K /* Page Size = 2K */ \ | CSOR_NAND_SPRZ_128 /* Spare size = 128 */ \ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) #endif -#define CONFIG_SYS_NAND_ONFI_DETECTION /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ @@ -520,14 +516,6 @@ unsigned long get_board_sys_clk(void); */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) #define CONFIG_SYS_QE_FW_ADDR (512 * 0x920) -#elif defined(CONFIG_MTD_RAW_NAND) -#if defined(CONFIG_TARGET_T1024RDB) -#define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE) -#define CONFIG_SYS_QE_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) -#elif defined(CONFIG_TARGET_T1023RDB) -#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) -#define CONFIG_SYS_QE_FW_ADDR (12 * CONFIG_SYS_NAND_BLOCK_SIZE) -#endif #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 7c48c3af71f..4485f40a6b3 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -236,7 +236,6 @@ #define CONFIG_SYS_CS2_FTIM3 0x0 /* NAND Flash on IFC */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0xff800000 #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) @@ -255,8 +254,6 @@ | CSOR_NAND_SPRZ_224/* Spare size = 224 */ \ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ -#define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ @@ -275,8 +272,6 @@ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) - #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR @@ -520,8 +515,6 @@ * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) -#elif defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FMAN_FW_ADDR (5 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif @@ -530,8 +523,6 @@ #define CONFIG_SYS_QE_FW_ADDR 0x130000 #elif defined(CONFIG_SDCARD) #define CONFIG_SYS_QE_FW_ADDR (512 * 0x920) -#elif defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_QE_FW_ADDR (7 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FW_ADDR 0xEFF10000 #endif diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 57640acfc90..e70d1089195 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -214,7 +214,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_CS3_FTIM3 0x0 /* NAND Flash on IFC */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0xff800000 #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) @@ -233,8 +232,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_64 /* Spare size = 64 */\ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ -#define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ @@ -252,7 +249,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT @@ -500,8 +496,6 @@ unsigned long get_board_sys_clk(void); * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) -#elif defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 6f27386d2ba..fbe8852c484 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -188,7 +188,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_CS2_FTIM3 0x0 /* NAND Flash on IFC */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0xff800000 #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) @@ -207,8 +206,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_64 /* Spare size = 64 */\ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ -#define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ @@ -226,7 +223,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT @@ -454,8 +450,6 @@ unsigned long get_board_sys_clk(void); */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) -#elif defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index b7cbf87d306..87e3e67a9ad 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -284,7 +284,6 @@ unsigned long get_board_sys_clk(void); + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} /* NAND Flash on IFC */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_BASE 0xff800000 @@ -305,8 +304,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(128)) /*Page Per Block = 128*/ -#define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ @@ -325,8 +322,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) - #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR @@ -475,8 +470,6 @@ unsigned long get_board_sys_clk(void); * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) -#elif defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 0f6ffd9ba7c..7fb1b3a3e3f 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -180,14 +180,7 @@ #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) /* NAND: driver related configs */ -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -198,9 +191,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 /* NAND: SPL related configs */ #ifdef CONFIG_SPL_OS_BOOT #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ @@ -261,8 +251,6 @@ /* SPL related */ #elif defined(CONFIG_EMMC_BOOT) #define CONFIG_SYS_MMC_MAX_DEVICE 2 -#elif defined(CONFIG_ENV_IS_IN_NAND) -#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #endif /* Network. */ diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index d93db09c9b5..68b4e4f5903 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -106,14 +106,6 @@ #define CONFIG_SYS_BOOTCOUNT_LE #ifdef CONFIG_MTD_RAW_NAND - -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 4096 -#define CONFIG_SYS_NAND_OOBSIZE 256 -#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024) - #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ @@ -138,12 +130,8 @@ } #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 26 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW #define MTDIDS_DEFAULT "nand0=nand.0" -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS - #endif /* CONFIG_MTD_RAW_NAND */ #define CONFIG_AM335X_USB0 diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index 95ba949b217..339a975c74c 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -103,16 +103,8 @@ /* Ethernet support */ /* NAND support */ -#define CONFIG_SYS_NAND_ONFI_DETECTION 1 /* NAND config */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -123,6 +115,5 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW #endif /* ! __CONFIG_IGEP003X_H */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index e54708ccb5a..bf01a777cce 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -19,12 +19,6 @@ /* Board NAND Info. */ #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \ 11, 12, 13, 14, 16, 17, 18, 19, 20, \ 21, 22, 23, 24, 25, 26, 27, 28, 30, \ @@ -34,11 +28,9 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 13 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW #define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000 /* NAND block size is 128 KiB. Synchronize these values with * corresponding Device Tree entries in Linux: diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 00426597ee5..7bea61ec155 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -157,16 +157,7 @@ /* NAND support */ #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ -#define CONFIG_SYS_NAND_PAGE_SIZE 4096 -#define CONFIG_SYS_NAND_OOBSIZE 224 -#define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024) -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_5_ADDR_CYCLE /* NAND: driver related configs */ -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ @@ -191,7 +182,6 @@ } #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 26 -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000 /* NAND: SPL related configs */ /* NAND: SPL falcon mode configs */ #ifdef CONFIG_SPL_OS_BOOT diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 78ff5777670..500c9ae3951 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -93,17 +93,10 @@ #elif CONFIG_NAND_BOOT #define CONFIG_SPL_NAND_SOFTECC -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 4ae6b66a3b2..43f98520722 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -114,12 +114,5 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 #endif diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 33481dc0459..f15711ba2b1 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -97,12 +97,5 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 #endif diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 2fe6c863939..32f2174641a 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -209,13 +209,6 @@ #ifndef CONFIG_NOR_BOOT #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -226,8 +219,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #endif #endif diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index 84ea032e2fb..c377094f11c 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -61,7 +61,6 @@ #include <linux/sizes.h> /* NAND support */ -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define IMX_FEC1_BASE ENET1_BASE_ADDR diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index d9300de4783..de45f74923a 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -29,7 +29,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* CONFIG_MTD_RAW_NAND */ /* diff --git a/include/configs/broadcom_bcm968360bg.h b/include/configs/broadcom_bcm968360bg.h index 66c12675e6d..0391f062181 100644 --- a/include/configs/broadcom_bcm968360bg.h +++ b/include/configs/broadcom_bcm968360bg.h @@ -28,7 +28,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* CONFIG_MTD_RAW_NAND */ /* diff --git a/include/configs/broadcom_bcm968380gerg.h b/include/configs/broadcom_bcm968380gerg.h index 8d572f6b763..866de2527d0 100644 --- a/include/configs/broadcom_bcm968380gerg.h +++ b/include/configs/broadcom_bcm968380gerg.h @@ -9,5 +9,4 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h index 26ba55a43a3..179aa9d608c 100644 --- a/include/configs/broadcom_bcm968580xref.h +++ b/include/configs/broadcom_bcm968580xref.h @@ -28,7 +28,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* CONFIG_MTD_RAW_NAND */ /* diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 9fb861b9a0d..4c56a8a59b0 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -46,7 +46,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #endif /* CONFIG_MTD_RAW_NAND */ #ifdef CONFIG_MTD_RAW_NAND @@ -145,14 +144,6 @@ NANDTGTS \ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x8000000 /* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */ -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 86cac236f96..49a8d710318 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -123,14 +123,7 @@ #define CONFIG_SYS_BOOTCOUNT_BE /* NAND: device related configs */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) /* NAND: driver related configs */ -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -141,9 +134,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 /* NAND: SPL related configs */ /* USB configuration */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index d40c3a9c3e5..7545979defa 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -142,9 +142,7 @@ /* NAND */ #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_ONFI_DETECTION /* APBH DMA is required for NAND support */ #endif diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index faeb903f359..4b6e391d576 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -85,13 +85,6 @@ /* Network. */ /* NAND support */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -105,11 +98,7 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#undef CONFIG_SYS_NAND_U_BOOT_OFFS -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 - #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_SYS_NAND_ONFI_DETECTION #ifdef CONFIG_SPL_OS_BOOT #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000 #endif diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 6e5c26edc93..e250dc92dda 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -22,17 +22,8 @@ #endif /* NAND support */ -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index d95c838eeb9..a2f2de7ea1c 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -121,7 +121,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */ #define CONFIG_SYS_NAND_BASE -1 -#define CONFIG_SYS_NAND_ONFI_DETECTION /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 65093664396..07c26e3d0ba 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -188,8 +188,6 @@ /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES #endif diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index f9d0d926eed..25a772914a2 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -26,7 +26,6 @@ #endif /* NAND support */ -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_IPADDR 192.168.10.2 diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index c4c7029c70a..fc890af915a 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -11,5 +11,4 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 79fca968dc0..7fd1ad14b54 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -172,7 +172,6 @@ #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) /* NAND flash config */ #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ @@ -382,7 +381,7 @@ */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) #elif defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (8 * (128 * 1024)) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* * Slave has no ucode locally, it can fetch this from remote. When implementing diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 32f4a10cf56..f0e5bcefe39 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -93,20 +93,12 @@ #define CONFIG_SPL_NAND_RAW_ONLY #define CONFIG_SPL_NAND_SOFTECC -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K -#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 34683f60c7a..f7c5d400cf9 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -121,9 +121,6 @@ #undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST @@ -137,12 +134,8 @@ 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \ 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \ 59, 60, 61, 62, 63 } -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 10 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SPL_NAND_LOAD #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_NAND_SELF_INIT diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 83f5b71839e..41216b8b4fc 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -23,7 +23,6 @@ #endif /* NAND */ -#define CONFIG_SYS_NAND_ONFI_DETECTION /* Keep device tree and initrd in lower memory so the kernel can access them */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 9f5e665e6f6..48471993b88 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -38,7 +38,6 @@ #endif /* NAND */ -#define CONFIG_SYS_NAND_ONFI_DETECTION /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h index f04ae487b76..2c543fe12a8 100644 --- a/include/configs/db-xc3-24g4xg.h +++ b/include/configs/db-xc3-24g4xg.h @@ -18,7 +18,6 @@ /* Environment in SPI NOR flash */ /* NAND */ -#define CONFIG_SYS_NAND_ONFI_DETECTION /* Keep device tree and initrd in lower memory so the kernel can access them */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index c2340b26507..8e8ea56f3cf 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -64,9 +64,6 @@ #define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000 #define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 -#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE - /* * USB */ @@ -130,7 +127,6 @@ #define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index a2a1d93faa9..591a33fca68 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -133,20 +133,12 @@ /* Defines for SPL */ /* NAND boot config */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 /* SPL OS boot options */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 361ee9663db..c54f375689f 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -80,16 +80,7 @@ /* NAND support */ #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_5_ADDR_CYCLE /* NAND: driver related configs */ -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -99,7 +90,6 @@ 50, 51, 52, 53, 54, 55, 56, 57, } #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00140000 /* NAND: SPL related configs */ /* NAND: SPL falcon mode configs */ #ifdef CONFIG_SPL_OS_BOOT diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 7831687114b..3ff86eed835 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -14,19 +14,10 @@ #include "siemens-am33x-common.h" /* NAND specific changes for etamin due to different page size */ -#undef CONFIG_SYS_NAND_PAGE_SIZE -#undef CONFIG_SYS_NAND_OOBSIZE -#undef CONFIG_SYS_NAND_BLOCK_SIZE #undef CONFIG_SYS_NAND_ECCPOS -#undef CONFIG_SYS_NAND_U_BOOT_OFFS #undef CONFIG_SYS_ENV_SECT_SIZE -#undef CONFIG_NAND_OMAP_ECCSCHEME -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW #define CONFIG_SYS_ENV_SECT_SIZE (512 << 10) /* 512 KiB */ -#define CONFIG_SYS_NAND_PAGE_SIZE 4096 -#define CONFIG_SYS_NAND_OOBSIZE 224 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * CONFIG_SYS_NAND_PAGE_SIZE) #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ @@ -55,17 +46,12 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 26 -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 - -#define CONFIG_SYS_NAND_MAX_CHIPS 1 - #undef CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_MAX_NAND_DEVICE 3 #define CONFIG_SYS_NAND_BASE2 (0x18000000) /* physical address */ #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \ CONFIG_SYS_NAND_BASE2} -#define CONFIG_SYS_NAND_ONFI_DETECTION #define DDR_PLL_FREQ 303 /* FWD Button = 27 diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 72852a0d91f..9d96dfcc31e 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -55,18 +55,10 @@ #define CONFIG_SYS_MCKR_CSS 0x1302 #define CONFIG_SPL_NAND_RAW_ONLY -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0xa0000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 - #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index f0289582609..3f6afc1646f 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -8,7 +8,6 @@ /* SPL */ /* Location in NAND to read U-Boot from */ -#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M) /* Falcon Mode */ #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index e759db2ff2f..370f7ed2bcb 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -129,10 +129,6 @@ */ #define CONFIG_SYS_NAND_BASE 0xE1000000 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 -#define CONFIG_NAND_FSL_ELBC -#define CONFIG_SYS_NAND_PAGE_SIZE (2048) -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) #define NAND_CACHE_PAGES 64 diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 4b45e33ad15..9af0a040403 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -137,10 +137,7 @@ #ifdef CONFIG_NAND_MXS # define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_BASE 0x40000000 -# define CONFIG_SYS_NAND_5_ADDR_CYCLE -# define CONFIG_SYS_NAND_ONFI_DETECTION # define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -# define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 /* MTD device */ #endif diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index e49370305c6..f1b78c6751a 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -129,10 +129,7 @@ /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00500000 /* MTD device */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 75d109a88d4..a5bc6895575 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -94,7 +94,6 @@ #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 /* NAND Flash Definitions */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0x68000000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -115,8 +114,6 @@ | CSOR_NAND_TRHZ_40 \ | CSOR_NAND_BCTLD) -#define CONFIG_SYS_NAND_ONFI_DETECTION - #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x3) | \ FTIM0_NAND_TWP(0x8) | \ FTIM0_NAND_TWCHT(0x3) | \ @@ -141,7 +138,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) /* QRIO FPGA Definitions */ #define CONFIG_SYS_QRIO_BASE 0x70000000 diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index bf876df554f..91b50cb29af 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -256,7 +256,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} /* NAND Flash on IFC CS1*/ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0xfa000000 #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) @@ -278,8 +277,6 @@ CSOR_NAND_TRHZ_40 | /**/ \ CSOR_NAND_BCTLD) /**/ -#define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x3) | \ FTIM0_NAND_TWP(0x8) | \ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index a164796dd87..748c04ba69f 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -46,8 +46,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SPL_PAD_TO 0x1c000 #define CONFIG_SYS_NAND_U_BOOT_SIZE (400 << 10) -#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE @@ -126,7 +124,6 @@ unsigned long get_board_sys_clk(void); /* * NAND Flash Definitions */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -146,8 +143,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_ONFI_DETECTION - #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ @@ -163,8 +158,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 - -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) #endif /* diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index fb697bdf130..6e8eebfe226 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -174,10 +174,7 @@ #else -#ifdef CONFIG_NAND_BOOT -/* Store Fman ucode at offeset 0x900000(72 blocks). */ -#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE) -#elif defined(CONFIG_SD_BOOT) +#if defined(CONFIG_SD_BOOT) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is * about 1MB (2040 blocks), Env is stored after the image, and the env size is diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 4ef4cacd97d..1d15f2fc585 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -111,7 +111,6 @@ unsigned long get_board_sys_clk(void); /* * NAND Flash Definitions */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -131,8 +130,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_ONFI_DETECTION - #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ @@ -149,13 +146,10 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE - -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) #endif #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */ -#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) #endif diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 906cd09f6eb..0d071c4ab74 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -72,9 +72,6 @@ /* * NAND Flash Definitions */ -#ifndef SPL_NO_IFC -#define CONFIG_NAND_FSL_IFC -#endif #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -93,8 +90,6 @@ | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_ONFI_DETECTION - #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ @@ -112,11 +107,8 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) - #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */ -#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO #define CONFIG_SYS_NAND_U_BOOT_SIZE (1024 << 10) #endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index f0bde08f246..f199c94ed10 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -166,7 +166,7 @@ #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_FMAN_FW_ADDR 0x40900000 #elif defined(CONFIG_NAND_BOOT) -#define CONFIG_SYS_FMAN_FW_ADDR (36 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (36 * (256 * 1024)) #else #define CONFIG_SYS_FMAN_FW_ADDR 0x60900000 #endif diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 7da08605f5a..5b78c5f7ab6 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -22,7 +22,6 @@ /* * NAND Flash Definitions */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -41,8 +40,6 @@ | CSOR_NAND_SPRZ_128 /* Spare size = 128 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_ONFI_DETECTION - #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ @@ -60,8 +57,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) - /* IFC Timing Params */ #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index b6bbc01304a..2e3824041c9 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -126,7 +126,6 @@ unsigned long get_board_sys_clk(void); /* * NAND Flash Definitions */ -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_BASE 0x7e800000 #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE @@ -146,8 +145,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_ONFI_DETECTION - #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ @@ -164,13 +161,10 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE - -#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024) #endif #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PAD_TO 0x40000 /* block aligned */ -#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #endif diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index d3f5d8ce95e..d06f3380a78 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -33,7 +33,6 @@ /* * NAND Flash Definitions */ -#define CONFIG_NAND_FSL_IFC #endif #define CONFIG_SYS_NAND_BASE 0x7e800000 @@ -53,8 +52,6 @@ | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_ONFI_DETECTION - #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ @@ -72,8 +69,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) - /* * CPLD */ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index a7d8cb50fcc..8923e329577 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -95,7 +95,6 @@ unsigned long get_board_sys_clk(void); #endif #endif -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 @@ -114,8 +113,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ -#define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ @@ -134,8 +131,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) - #define CONFIG_FSL_QIXIS #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 6 diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 4a61345db2e..f82b618e651 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -71,10 +71,6 @@ #endif #endif -#ifndef SPL_NO_IFC -#define CONFIG_NAND_FSL_IFC -#endif - #define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 @@ -93,8 +89,6 @@ | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ -#define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ @@ -113,8 +107,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) - #ifndef SPL_NO_QIXIS #define CONFIG_FSL_QIXIS #endif diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index e831d3797d1..e67dee0f00b 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -100,7 +100,6 @@ unsigned long get_board_sys_clk(void); CONFIG_SYS_FLASH_BASE + 0x40000000} #endif -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 @@ -119,8 +118,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ -#define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ @@ -139,8 +136,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) - #define CONFIG_FSL_QIXIS /* use common QIXIS code */ #define QIXIS_LBMAP_SWITCH 0x06 #define QIXIS_LBMAP_MASK 0x0f @@ -213,7 +208,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 #define CONFIG_SPL_PAD_TO 0x20000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 * 1024) #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024) #endif #else diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 5568a48ced9..54fab54609e 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -108,7 +108,6 @@ unsigned long get_board_sys_clk(void); CONFIG_SYS_FLASH_BASE + 0x40000000} #endif -#define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_NAND_MAX_ECCPOS 256 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 @@ -127,8 +126,6 @@ unsigned long get_board_sys_clk(void); | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(128)) /* Pages Per Block 128*/ -#define CONFIG_SYS_NAND_ONFI_DETECTION - /* ONFI NAND Flash mode0 Timing Params */ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x0e) | \ FTIM0_NAND_TWP(0x30) | \ @@ -147,7 +144,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) #define CONFIG_FSL_QIXIS /* use common QIXIS code */ #define QIXIS_LBMAP_SWITCH 0x06 #define QIXIS_LBMAP_MASK 0x0f @@ -206,7 +202,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 #define CONFIG_SPL_PAD_TO 0x80000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (1024 * 1024) #define CONFIG_SYS_NAND_U_BOOT_SIZE (512 * 1024) #else #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 813d326cdaf..5dd5ddac172 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -139,12 +139,7 @@ #define CONFIG_SPL_PAD_TO 0x8000 #define CONFIG_SPL_STACK 0x70004000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 /* * Extra Environments diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index beecf1838e4..2f8be2ee494 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -33,8 +33,6 @@ /* When runtime detection fails this is the default */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 -#define CONFIG_SYS_NAND_ONFI_DETECTION /* * Ethernet Driver configuration diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 5cd51a4af06..5e8446088b1 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -52,8 +52,6 @@ /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_ONFI_DETECTION /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 62b8de3c1aa..df02c523084 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -106,8 +106,6 @@ /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_ONFI_DETECTION /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 42b729b40bc..397af53bec3 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -111,8 +111,6 @@ /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_ONFI_DETECTION /* DMA stuff, needed for GPMI/MXS NAND support */ #endif diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 64f017ab77f..b5c525dc786 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -114,7 +114,6 @@ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x60000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE #endif /* OCOTP */ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 3ceedef1c6e..83dccf7d8ea 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -95,7 +95,6 @@ #if defined(CONFIG_NAND_OCTEONTX) /*#define CONFIG_MTD_CONCAT */ #define CONFIG_SYS_MAX_NAND_DEVICE 8 -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif #endif /* __OCTEONTX_COMMON_H__ */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 8c830d916c1..158773acedb 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -22,18 +22,10 @@ #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #define CONFIG_SYS_ENV_SECT_SIZE SZ_128K /* NAND: SPL falcon mode configs */ #if defined(CONFIG_SPL_OS_BOOT) diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index b12e3a40285..eeb9ef8c741 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -27,17 +27,10 @@ #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW #define CONFIG_SYS_ENV_SECT_SIZE SZ_128K /* NAND: SPL falcon mode configs */ #if defined(CONFIG_SPL_OS_BOOT) diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 0fee2ed921c..c1ef040ce36 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -75,12 +75,6 @@ #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) /* NAND config */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -90,6 +84,5 @@ 50, 51, 52, 53, 54, 55, 56, 57, } #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW #endif /* __IGEP00X0_H */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index cac35ef0795..e71f7371d8c 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -18,12 +18,6 @@ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 23, 24, 25, 26, 27, 28, 30, 31, 32, \ @@ -33,7 +27,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 13 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW #define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 #endif diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index d20c9e238c3..4227610566d 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -122,9 +122,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST #define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10) -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST @@ -137,12 +134,8 @@ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \ 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ 54, 55, 56, 57, 58, 59, 60, 61, 62, 63 } -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 10 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SPL_NAND_LOAD #endif /* diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 58336110568..d3ac057d1cd 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -14,7 +14,6 @@ #if defined(CONFIG_TARGET_P1020RDB_PC) #define CONFIG_BOARDNAME "P1020RDB-PC" -#define CONFIG_NAND_FSL_ELBC #define CONFIG_VSC7385_ENET #define CONFIG_SLIC #define __SW_BOOT_MASK 0x03 @@ -41,7 +40,6 @@ */ #if defined(CONFIG_TARGET_P1020RDB_PD) #define CONFIG_BOARDNAME "P1020RDB-PD" -#define CONFIG_NAND_FSL_ELBC #define CONFIG_VSC7385_ENET #define CONFIG_SLIC #define __SW_BOOT_MASK 0x03 @@ -58,7 +56,6 @@ #if defined(CONFIG_TARGET_P2020RDB) #define CONFIG_BOARDNAME "P2020RDB-PC" -#define CONFIG_NAND_FSL_ELBC #define CONFIG_VSC7385_ENET #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0xc8 @@ -85,9 +82,7 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_COMMON_INIT_DDR #endif -#endif - -#ifdef CONFIG_SPIFLASH +#elif defined(CONFIG_SPIFLASH) #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" @@ -101,9 +96,7 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_COMMON_INIT_DDR #endif -#endif - -#ifdef CONFIG_MTD_RAW_NAND +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_NAND_INIT @@ -290,11 +283,6 @@ #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#else -#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) -#endif #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 5b2e084a224..244d373843c 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -13,7 +13,6 @@ #include <linux/stringify.h> /* NAND support */ -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 3ca03774506..a0bb2b50505 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -16,7 +16,6 @@ /* Enable NAND support */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_ONFI_DETECTION /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h index 4925fcc8cfd..af6f7e14dfd 100644 --- a/include/configs/phycore_am335x_r2.h +++ b/include/configs/phycore_am335x_r2.h @@ -85,14 +85,7 @@ #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) /* NAND: driver related configs */ -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -103,8 +96,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW /* NAND: SPL related configs */ #ifdef CONFIG_SPL_OS_BOOT @@ -116,8 +107,6 @@ #ifdef CONFIG_SPI_BOOT #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 -#elif defined(CONFIG_ENV_IS_IN_NAND) -#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #endif #endif /* ! __CONFIG_PHYCORE_AM335x_R2_H */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index c22f698d31d..3d039b60a86 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -83,17 +83,10 @@ #elif CONFIG_NAND_BOOT #define CONFIG_SPL_NAND_SOFTECC -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 8606eb1ee72..8d689d9e4be 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -77,9 +77,7 @@ /* nand driver parameters */ #ifdef CONFIG_TARGET_PRESIDIO_ASIC - #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 1 - #define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #endif diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index edaf78a6e81..496f4628d34 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -9,11 +9,6 @@ #include "rockchip-common.h" #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) #define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_BSS_START_ADDR 0x00400000 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index 774ecb41938..df30d4868bd 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -46,7 +46,6 @@ #define CONFIG_SYS_NAND_MASK_CLE BIT(22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif #ifdef CONFIG_SD_BOOT diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h index 1001bbcf930..1ffe35bd875 100644 --- a/include/configs/sama5d2_ptc_ek.h +++ b/include/configs/sama5d2_ptc_ek.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_NAND_MASK_ALE BIT(21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE BIT(22) -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif #endif /* __CONFIG_H */ diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 20d1d34044a..119b4a652cc 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -42,7 +42,6 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* USB */ @@ -69,13 +68,6 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 /* Falcon boot support on raw MMC */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x100 /* 128 KiB */ diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index ac52e272174..67640f44151 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -56,7 +56,6 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* USB */ @@ -81,12 +80,5 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 #endif diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 3032297731a..e0e0bc6beb7 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* SPL */ @@ -45,12 +44,5 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_OOBSIZE 224 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 #endif diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index 4e8fe8693cc..2549d4c1a19 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* SPL */ @@ -45,12 +44,5 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_OOBSIZE 224 -#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 #endif diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 6ccba95f305..615458cde8b 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -72,14 +72,6 @@ #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -90,7 +82,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW #define CONFIG_SYS_NAND_ECCSTEPS 4 #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ @@ -98,8 +89,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 - /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM * 64 bytes before this address should be set aside for u-boot.img's diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 5bcc3a66d3a..2538287e4cf 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -162,21 +162,13 @@ #define CONFIG_SYS_USE_NANDFLASH 1 #define CONFIG_SPL_NAND_RAW_ONLY #define CONFIG_SPL_NAND_SOFTECC -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_SIZE (SZ_256M) -#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K -#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 0b37efeafa3..fc1d451b8f8 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -111,11 +111,6 @@ /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> -#ifdef CONFIG_SPL_NAND_SUPPORT -#undef CONFIG_SYS_NAND_U_BOOT_OFFS -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -#endif - #undef CONFIG_WATCHDOG_TIMEOUT_MSECS #define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index ed3aac7f3ac..31f95f52f8c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -123,9 +123,7 @@ * NAND Support */ #ifdef CONFIG_NAND_DENALI -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS #define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS #endif @@ -198,13 +196,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL QSPI boot support */ /* SPL NAND boot support */ -#ifdef CONFIG_SPL_NAND_SUPPORT -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x100000 -#endif -#endif /* Extra Environment */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 4ccaab5b473..06cd153d135 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -52,7 +52,6 @@ #define CONFIG_SYS_MMC_MAX_DEVICE 3 /* NAND support */ -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Ethernet need */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index f7d0a7ef95c..5d8b6052e4f 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -91,7 +91,6 @@ #ifdef CONFIG_NAND_SUNXI #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 8 #endif diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index adbc2ae0c5d..a47e2c5b285 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -126,22 +126,14 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ /* NAND boot config */ -#define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 48, 49, 50, 51, 52, 53, 54, 55,\ 56, 57, 58, 59, 60, 61, 62, 63} #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 /* Setup MTD for NAND on the SOM */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 23f1e378e62..1dd78238947 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -164,21 +164,13 @@ #define CONFIG_SYS_USE_NANDFLASH 1 #define CONFIG_SPL_NAND_RAW_ONLY #define CONFIG_SPL_NAND_SOFTECC -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) -#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K -#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index e99e65fd2f4..19934a4cf0b 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -81,6 +81,5 @@ #define CONFIG_EHCI_IS_TDI #define CONFIG_SYS_NAND_SELF_INIT -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif /* _TEGRA20_COMMON_H_ */ diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index cffa79416f9..fa99152d6f6 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -57,14 +57,7 @@ /* NAND: SPL related configs */ /* NAND: device related configs */ -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) /* NAND: driver related configs */ -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ @@ -75,10 +68,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 -#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE /* SPL */ /* Defines for SPL */ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index a6d7b8a0739..8b0dd49e027 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -94,7 +94,6 @@ #define CONFIG_SYS_NAND_LARGEPAGE #define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE #define DFU_ALT_INFO_MMC \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index d419db1fa4b..dbd4a0089ec 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -54,10 +54,8 @@ #endif #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 /* * Network Configuration @@ -195,8 +193,6 @@ /* only for SPL */ #define CONFIG_SPL_STACK (0x00100000) -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 - /* subtract sizeof(struct image_header) */ #define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40) diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 49053ce2d79..29d6c3576b8 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_FSL_CLK /* NAND support */ -#define CONFIG_SYS_NAND_ONFI_DETECTION #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 83b24a7dcc8..a45d3b4547b 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -59,7 +59,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_CHIPS 1 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE -#define CONFIG_NAND_LPC32XX_MLC /* * GPIO @@ -87,7 +86,6 @@ /* Use the framework and generic lib */ /* SPL will use serial */ /* SPL will load U-Boot from NAND offset 0x40000 */ -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00040000 #define CONFIG_SPL_PAD_TO 0x20000 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */ #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */ diff --git a/include/configs/x530.h b/include/configs/x530.h index 1e5d7381052..d6aec6d7f25 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -29,7 +29,6 @@ */ /* NAND */ -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define BBT_CUSTOM_SCAN @@ -59,7 +58,6 @@ #endif /* NAND */ -#define CONFIG_SYS_NAND_ONFI_DETECTION #include <asm/arch/config.h> diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e10d90cdc77..f8607b76172 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -37,7 +37,6 @@ #ifdef CONFIG_NAND_ARASAN # define CONFIG_SYS_MAX_NAND_DEVICE 1 -# define CONFIG_SYS_NAND_ONFI_DETECTION #endif #if defined(CONFIG_SPL_BUILD) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 9b4c54b5e6a..0c87f19ac36 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -52,7 +52,6 @@ #ifdef CONFIG_NAND_ZYNQ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_ONFI_DETECTION #endif #ifdef CONFIG_USB_EHCI_ZYNQ diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h index 7239eb1125c..fb86f1ddef9 100644 --- a/include/linux/mtd/bbm.h +++ b/include/linux/mtd/bbm.h @@ -15,11 +15,6 @@ #ifndef __LINUX_MTD_BBM_H #define __LINUX_MTD_BBM_H -/* The maximum number of NAND chips in an array */ -#ifndef CONFIG_SYS_NAND_MAX_CHIPS -#define CONFIG_SYS_NAND_MAX_CHIPS 1 -#endif - /** * struct nand_bbt_descr - bad block table descriptor * @options: options for this descriptor diff --git a/include/mxs_nand.h b/include/mxs_nand.h index c0cefaca90b..66c909318d1 100644 --- a/include/mxs_nand.h +++ b/include/mxs_nand.h @@ -8,6 +8,7 @@ */ #include <linux/mtd/mtd.h> +#include <linux/mtd/rawnand.h> #include <asm/cache.h> #include <nand.h> #include <asm/mach-imx/dma.h> diff --git a/include/nand.h b/include/nand.h index 80dd6469bc0..75c605193ab 100644 --- a/include/nand.h +++ b/include/nand.h @@ -31,7 +31,6 @@ unsigned long nand_size(void); #include <linux/compat.h> #include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> int nand_mtd_to_devnum(struct mtd_info *mtd); @@ -39,6 +38,8 @@ int nand_mtd_to_devnum(struct mtd_info *mtd); void board_nand_init(void); int nand_register(int devnum, struct mtd_info *mtd); #else +struct nand_chip; + extern int board_nand_init(struct nand_chip *nand); #endif |