diff options
| author | Tanmay Kathpalia <[email protected]> | 2025-12-03 04:21:39 -0800 |
|---|---|---|
| committer | Peng Fan <[email protected]> | 2025-12-11 20:53:52 +0800 |
| commit | ed0e33cec099e3f9e459cef7f66ff91068e2d71c (patch) | |
| tree | 0494d62c6e660c7050ee45dffe366c16431664d0 /include | |
| parent | 7c2ba8a2024101463ec03b8003e6c0146f2db893 (diff) | |
mmc: sdhci-cadence6: Add DLL master control and improve tuning reliability
- Add support for configuring the PHY DLL master control register for all
SD/eMMC timing modes (DS, HS, SDR, DDR, HS200, HS400) by extending the
PHY configuration arrays and writing the value during PHY adjustment.
- Fix tuning reliability by toggling the DLL reset before and after
updating the PHY_DLL_SLAVE_CTRL_REG_ADDR register.
Signed-off-by: Tanmay Kathpalia <[email protected]>
Reviewed-by: Balsundar Ponnusamy <[email protected]>
Acked-by: Peng Fan <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions