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authorJagan Teki <[email protected]>2020-06-18 19:33:12 +0530
committerPeng Fan <[email protected]>2020-06-24 14:05:30 +0800
commitf12341a9529540113f01989149bbbeb68662a829 (patch)
tree862b32fcb9d807e3b9048e67a40bea1a72a8ed01 /include
parentfe95905ffed57d617cad81a71ac419d53aaa1ebf (diff)
mmc: sdhci: Fix HISPD bit handling
SDHCI HISPD bits need to be configured based on desired mmc timings mode and some HISPD quirks. So, handle the HISPD bit based on the mmc computed selected mode(timing parameter) rather than fixed mmc card clock frequency. Linux handle the HISPD similar like this in below commit but no SDHCI_QUIRK_BROKEN_HISPD_MODE, commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") This eventually fixed the mmc write issue observed in rk3399 sdhci controller. Bug log for refernece, => gpt write mmc 0 $partitions Writing GPT: mmc write failed ** Can't write to device 0 ** ** Can't write to device 0 ** error! Cc: Kever Yang <[email protected]> Cc: Peng Fan <[email protected]> Peng Fan: added back "ctrl &= ~SDHCI_CTRL_HISPD;" per Jaehoon's suggestion Tested-by: Suniel Mahesh <[email protected]> # roc-rk3399-pc Signed-off-by: Jagan Teki <[email protected]>
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