diff options
| author | Siva Durga Prasad Paladugu <[email protected]> | 2014-10-28 11:22:19 +0530 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2015-01-26 08:55:57 +0100 |
| commit | f60c6fbbc658201f968a22addff7dd1acbe5eaca (patch) | |
| tree | 36232fa5b868ef1572a9da4baebe235c84b5ac84 /include | |
| parent | 3ad87ca18203f8b0de0e30b7c12d2ffadf2d8553 (diff) | |
ARM: zynq: slcr: Dont modify the reserved bits
Set only the 0-3 bits of the FPGA_RST_CTRL register
as other bits should not be set to 1.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Reviewed-by: Peter Crosthwaite <[email protected]>
Reviewed-by: Nathan Rossi <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions