diff options
| author | Rui Miguel Silva <[email protected]> | 2022-05-11 10:55:41 +0100 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-06-22 12:35:15 -0400 |
| commit | f98457d70a35ad6bda284577a8a2a8ad7868b13b (patch) | |
| tree | 5bc50e248f8750cc1de86885b68844ed276782bc /include | |
| parent | bfef72e4dd1c1d6dfc680867bf24a78597ab0438 (diff) | |
arm: add support to corstone1000 platform
Corstone1000 is a platform from arm, which includes pre
verified Corstone SSE710 sub-system that combines Cortex-A and
Cortex-M processors [0].
This code adds the support for the Cortex-A35 implementation
at host side, it contains also the necessary bits to support
the Corstone 1000 FVP (Fixed Virtual Platform) [1] and also the
FPGA MPS3 board implementation of this platform. [2]
0: https://developer.arm.com/documentation/102360/0000
1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps
2: https://developer.arm.com/documentation/dai0550/c/
Signed-off-by: Rui Miguel Silva <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/corstone1000.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h new file mode 100644 index 00000000000..eba5cba0fba --- /dev/null +++ b/include/configs/corstone1000.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2022 ARM Limited + * (C) Copyright 2022 Linaro + * Rui Miguel Silva <[email protected]> + * Abdellatif El Khlifi <[email protected]> + * + * Configuration for Corstone1000. Parts were derived from other ARM + * configurations. + */ + +#ifndef __CORSTONE1000_H +#define __CORSTONE1000_H + +#include <linux/sizes.h> + +#define V2M_BASE 0x80000000 + +#define CONFIG_PL011_CLOCK 50000000 + +/* Physical Memory Map */ +#define PHYS_SDRAM_1 (V2M_BASE) +#define PHYS_SDRAM_1_SIZE 0x80000000 + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "usb_pgood_delay=250\0" \ + "boot_bank_flag=0x08002000\0" \ + "kernel_addr_bank_0=0x083EE000\0" \ + "kernel_addr_bank_1=0x0936E000\0" \ + "retrieve_kernel_load_addr=" \ + "if itest.l *${boot_bank_flag} == 0; then " \ + "setenv kernel_addr $kernel_addr_bank_0;" \ + "else " \ + "setenv kernel_addr $kernel_addr_bank_1;" \ + "fi;" \ + "\0" \ + "kernel_addr_r=0x88200000\0" + +#endif |