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authorJulien Panis <[email protected]>2023-05-29 15:42:28 +0200
committerTom Rini <[email protected]>2023-06-20 16:08:13 -0400
commitfb93bd8d264c3198f321dc23a83559fcfcc275d4 (patch)
tree5b78e6f5ae34e161dad180cd384a956f03c25355 /include
parent8dc2c666808a07c2ad484ef6c4f89aa551eaf265 (diff)
drivers: spi: omap3_spi: Initialize mode for all channels
At first SPI transfers, multiple chip selects can be enabled simultaneously. This is due to chip select polarity, which is not properly initialized for all channels. This patch fixes the issue. Signed-off-by: Julien Panis <[email protected]>
Diffstat (limited to 'include')
-rw-r--r--include/omap3_spi.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/omap3_spi.h b/include/omap3_spi.h
index cae37705830..5381431d438 100644
--- a/include/omap3_spi.h
+++ b/include/omap3_spi.h
@@ -46,6 +46,8 @@
#define OMAP4_MCSPI_REG_OFFSET 0x100
+#define OMAP4_MCSPI_CHAN_NB 4
+
/* OMAP3 McSPI registers */
struct mcspi_channel {
unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */
@@ -64,7 +66,7 @@ struct mcspi {
unsigned int wakeupenable; /* 0x20 */
unsigned int syst; /* 0x24 */
unsigned int modulctrl; /* 0x28 */
- struct mcspi_channel channel[4];
+ struct mcspi_channel channel[OMAP4_MCSPI_CHAN_NB];
/* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */
/* channel1: 0x40 - 0x50, bus 0 & 1 */
/* channel2: 0x54 - 0x64, bus 0 & 1 */