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authorYao Zi <[email protected]>2025-09-02 08:19:30 +0000
committerLeo Yu-Chi Liang <[email protected]>2025-09-19 19:22:29 +0800
commitfde7702c9b5a440fe86b4a8f35485f1920744ba7 (patch)
tree03f142bdc86c2d821a4d7a81d6484110c2957958 /include
parentcb1a70a856a53a435c7bb75d211ec51fa2855011 (diff)
riscv: Add Kconfig options to distinguish Zaamo and Zalrsc
Ratified on Apr. 2024, the original RISC-V "A" extension is now split into two separate extensions, "Zaamo" for atomic operations and "Zalrsc" for load-reserved/store-conditional instructions. For now, we've already seen real-world designs implement the Zalrsc extension only[2]. As U-Boot mainly runs with only one HART, we could easily support these designs by not using AMO instructions in the hard-written assembly if necessary, for which this patch introduces two new Kconfig options to indicate the availability of "Zaamo" and "Zalrsc". Note that even with this patch, "A" extension is specified in the ISA string passed to the compiler as long as one of "Zaamo" or "Zalrsc" is available, since they're only recognized with a quite recent version of GCC/Clang. The compiler usually doesn't automatically generate atomic instructions unless the source explicitly instructs it to do so, thus this should be safe. Link: https://github.com/riscv/riscv-zaamo-zalrsc/commit/d94c64c63e9120d56bdeb540caf2e5dae60a8126 # [1] Link: https://lore.kernel.org/u-boot/[email protected]/ # [2] Signed-off-by: Yao Zi <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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