diff options
| author | Tom Rini <[email protected]> | 2025-05-08 09:22:25 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-05-08 09:22:25 -0600 |
| commit | ffd5d9cc2720f225fc6e8fa557cb3487965b7067 (patch) | |
| tree | b9626c31b7a021a6405670a5b9a3ba6737e499f3 /include | |
| parent | ac204f07b28aedc26ffe0c52f919cda01fc01361 (diff) | |
| parent | d5b9b7aa039b03e6de4b32cc961f7ec1205ded75 (diff) | |
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/mocha.h | 19 | ||||
| -rw-r--r-- | include/configs/tegra.h | 4 | ||||
| -rw-r--r-- | include/configs/tegratab.h | 19 | ||||
| -rw-r--r-- | include/configs/transformer-t114.h | 19 | ||||
| -rw-r--r-- | include/power/max8907.h | 77 |
5 files changed, 81 insertions, 57 deletions
diff --git a/include/configs/mocha.h b/include/configs/mocha.h deleted file mode 100644 index 7255f31baec..00000000000 --- a/include/configs/mocha.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. - * - * Copyright (c) 2024, Svyatoslav Ryhel <[email protected]> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "tegra124-common.h" - -#ifdef CONFIG_TEGRA_SUPPORT_NON_SECURE - #define CFG_PRAM 0x38400 /* 225 MB */ -#endif - -#include "tegra-common-post.h" - -#endif /* __CONFIG_H */ diff --git a/include/configs/tegra.h b/include/configs/tegra.h index 77bc38930d2..5db3129fade 100644 --- a/include/configs/tegra.h +++ b/include/configs/tegra.h @@ -29,6 +29,10 @@ #include "tegra210-common.h" #endif +#ifdef CONFIG_TEGRA_PRAM + #define CFG_PRAM CONFIG_TEGRA_PRAM_SIZE +#endif + #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/tegratab.h b/include/configs/tegratab.h deleted file mode 100644 index afab01ec09c..00000000000 --- a/include/configs/tegratab.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. - * - * Copyright (c) 2023, Svyatoslav Ryhel <[email protected]> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "tegra114-common.h" - -#ifdef CONFIG_TEGRA_SUPPORT_NON_SECURE - #define CFG_PRAM 0x21c00 /* 135 MB */ -#endif - -#include "tegra-common-post.h" - -#endif /* __CONFIG_H */ diff --git a/include/configs/transformer-t114.h b/include/configs/transformer-t114.h deleted file mode 100644 index 2fbf3417691..00000000000 --- a/include/configs/transformer-t114.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. - * - * Copyright (c) 2023, Svyatoslav Ryhel <[email protected]> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "tegra114-common.h" - -#ifdef CONFIG_TEGRA_SUPPORT_NON_SECURE - #define CFG_PRAM 0x20000 /* 128 MB */ -#endif - -#include "tegra-common-post.h" - -#endif /* __CONFIG_H */ diff --git a/include/power/max8907.h b/include/power/max8907.h new file mode 100644 index 00000000000..a6e558e582c --- /dev/null +++ b/include/power/max8907.h @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright(C) 2024 Svyatoslav Ryhel <[email protected]> + */ + +#ifndef _MAX8907_H_ +#define _MAX8907_H_ + +#define MAX8907_LDO_NUM 20 +#define MAX8907_SD_NUM 3 + +/* Drivers name */ +#define MAX8907_LDO_DRIVER "max8907_ldo" +#define MAX8907_SD_DRIVER "max8907_sd" +#define MAX8907_RST_DRIVER "max8907_rst" + +/* MAX8907 register map */ +#define MAX8907_REG_SDCTL1 0x04 +#define MAX8907_REG_SDCTL2 0x07 +#define MAX8907_REG_SDCTL3 0x0A + +#define MAX8907_REG_LDOCTL16 0x10 +#define MAX8907_REG_LDOCTL17 0x14 +#define MAX8907_REG_LDOCTL1 0x18 +#define MAX8907_REG_LDOCTL2 0x1C +#define MAX8907_REG_LDOCTL3 0x20 +#define MAX8907_REG_LDOCTL4 0x24 +#define MAX8907_REG_LDOCTL5 0x28 +#define MAX8907_REG_LDOCTL6 0x2C +#define MAX8907_REG_LDOCTL7 0x30 +#define MAX8907_REG_LDOCTL8 0x34 +#define MAX8907_REG_LDOCTL9 0x38 +#define MAX8907_REG_LDOCTL10 0x3C +#define MAX8907_REG_LDOCTL11 0x40 +#define MAX8907_REG_LDOCTL12 0x44 +#define MAX8907_REG_LDOCTL13 0x48 +#define MAX8907_REG_LDOCTL14 0x4C +#define MAX8907_REG_LDOCTL15 0x50 +#define MAX8907_REG_LDOCTL19 0x5C +#define MAX8907_REG_LDOCTL18 0x72 +#define MAX8907_REG_LDOCTL20 0x9C + +#define MAX8907_REG_RESET_CNFG 0x0F +#define MASK_POWER_OFF BIT(6) + +/* MAX8907 configuration values */ +#define MAX8907_CTL 0 +#define MAX8907_SEQCNT 1 +#define MAX8907_VOUT 2 + +/* mask bit fields */ +#define MAX8907_MASK_LDO_SEQ 0x1C +#define MAX8907_MASK_LDO_EN 0x01 + +/* Step-Down (SD) Regulator calculations */ +#define SD1_VOLT_MAX 2225000 +#define SD1_VOLT_MIN 650000 +#define SD1_VOLT_STEP 25000 + +#define SD2_VOLT_MAX 1425000 +#define SD2_VOLT_MIN 637500 +#define SD2_VOLT_STEP 12500 + +#define SD3_VOLT_MAX 3900000 +#define SD3_VOLT_MIN 750000 +#define SD3_VOLT_STEP 50000 + +/* Low-Dropout Linear (LDO) Regulator calculations */ +#define LDO_750_VOLT_MAX 3900000 +#define LDO_750_VOLT_MIN 750000 +#define LDO_750_VOLT_STEP 50000 + +#define LDO_650_VOLT_MAX 2225000 +#define LDO_650_VOLT_MIN 650000 +#define LDO_650_VOLT_STEP 25000 + +#endif /* _MAX8907_H_ */ |
