diff options
| author | Billy Tsai <[email protected]> | 2026-07-02 18:08:36 +0800 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-07-14 15:40:20 -0600 |
| commit | c0e2aeb9dfe551a1b01a44dfffe917e8997898c3 (patch) | |
| tree | 61b0f3a3fa1822f80fa31fd8fa82386a20b533eb /programs/cipher | |
| parent | ada5d0e7e2ceb118a70df7d8c15b53d0d91c7d3b (diff) | |
pinctrl: aspeed: Add AST2700 SoC1 pinctrl driver
Add the pinctrl driver for the AST2700 SoC1 (I/O) die.
Unlike previous Aspeed generations, the SoC1 SCU assigns every pin a
4-bit multi-function selector field in a contiguous register range
starting at SCU 0x400, eight pins per register. Only bits [2:0] of
each field select the function; bit 3 is reserved read-only and must
not be written. The driver therefore keeps per-pin group tables and
per-function mux values, mirroring the Linux
aspeed,ast2700-soc1-pinctrl driver, and shares the same device tree
bindings: 220 pins, 238 groups and 217 functions with identical names,
so pin states written for the Linux driver work unmodified.
A few controls live outside the pin-indexed range and are handled as
virtual pins: PCIERC2_PERST (SCU 0x908), the USB2 port C/D mode fields
(SCU 0x3B0) and SGMII0 (SCU 0x47C).
The gpio_request_enable hook restores a pin to GPIO by writing mux
value 0, except for the ADC-capable balls W17..AB19 where function 1
selects GPIO and 0 selects the ADC input.
Signed-off-by: Billy Tsai <[email protected]>
Diffstat (limited to 'programs/cipher')
0 files changed, 0 insertions, 0 deletions
