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| author | Pali Rohár <[email protected]> | 2021-07-31 14:22:53 +0200 |
|---|---|---|
| committer | Stefan Roese <[email protected]> | 2021-08-11 08:42:26 +0200 |
| commit | 2ddf554b8648d892efc5733e7486cec5e93dc269 (patch) | |
| tree | 657272fc09b52c05a4fa88d1d569690adee12eaf /scripts/Makefile.spl | |
| parent | 29795302b942e6ee41c9d95f7e6e29f57d108d42 (diff) | |
arm: mvebu: a37x: Detect CONFIG_SYS_TCLK from SAR register
Bit 20 in SAR register specifies if TCLK is running at 200 MHz or 166 MHz.
Use this information instead of manual configuration in every board file.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Diffstat (limited to 'scripts/Makefile.spl')
0 files changed, 0 insertions, 0 deletions