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authorSean Anderson <[email protected]>2020-09-21 07:51:36 -0400
committerAndes <[email protected]>2020-09-30 08:54:52 +0800
commitd4990a46485f2f6592ae29f2b822043dbdeae15d (patch)
treecd415656cc2c7d527feae832c5026e4a23052ac4 /scripts/basic
parentc41045411bbb64eeda2d404b79723f8d2802351c (diff)
riscv: Match memory barriers between send_ipi_many and handle_ipi
Without a matching barrier on the write side, the barrier in handle_ipi does nothing. It was entirely possible for the boot hart to write to addr, arg0, and arg1 *after* sending the IPI, because there was no barrier on the sending side. Fixes: 90ae281437 ("riscv: add option to wait for ack from secondary harts in smp functions") Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Rick Chen <[email protected]> Reviewed-by: Leo Liang <[email protected]>
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