diff options
| author | Pali Rohár <[email protected]> | 2021-12-21 12:20:12 +0100 |
|---|---|---|
| committer | Stefan Roese <[email protected]> | 2022-01-14 07:47:57 +0100 |
| commit | 2ac06f3e66c13b793f9b0859888b7062f24910e6 (patch) | |
| tree | 9f54a3ac5cf37b129b2d7bdd27e437b24bedce04 /scripts/checkpatch.pl | |
| parent | 8f9e0f4d207e7bb65173c7cd00d91946cfb838a7 (diff) | |
board: gdsys: a38x: Enable PCIe link 2 in spl_board_init()
A385 controlcenterdc board does not use PCI DM properly and touches some
PCIe devices directly in its board code.
This controlcenterdc spl_board_init() function expects that PCIe link is
already initialized. Link itself is initialized in a38x serdes code but
this will change in future and link initialization will be postponed from
U-Boot SPL to proper U-Boot.
So explicitly enable PCIe link 2 in spl_board_init() function via
SoC Control Register 1 to not break this code by future changes. This board
has PCIe link 2 just x1, so no additional initialization (except enabling
PCIe port) is needed.
Signed-off-by: Pali Rohár <[email protected]>
Diffstat (limited to 'scripts/checkpatch.pl')
0 files changed, 0 insertions, 0 deletions
