summaryrefslogtreecommitdiff
path: root/scripts/checkpatch.pl
diff options
context:
space:
mode:
authorXingyu Wu <[email protected]>2023-07-07 18:50:09 +0800
committerLeo Yu-Chi Liang <[email protected]>2023-07-24 13:21:06 +0800
commit6c4b50e6deb719726a04ca154a6361bd866398f5 (patch)
tree8ccc2d154642e6b2e3f3a3b76a93e6957f495904 /scripts/checkpatch.pl
parent005f9627d02e8ecab3c58c77889060e72f7fa25d (diff)
riscv: dts: jh7110: Add clock source from PLL
Change the PLL clock source from syscrg to sys_syscon child node. Signed-off-by: Xingyu Wu <[email protected]> Signed-off-by: Hal Feng <[email protected]> Reviewed-by: Torsten Duwe <[email protected]> Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Diffstat (limited to 'scripts/checkpatch.pl')
0 files changed, 0 insertions, 0 deletions