diff options
| author | Ashok Reddy Soma <[email protected]> | 2023-07-20 01:28:59 -0600 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2023-07-21 09:00:39 +0200 |
| commit | 2a907542c77610817504321f32a78422f9a23d1d (patch) | |
| tree | 7da3617379af83d0dbdba59cad01025524f6deb6 /scripts/checkstack.pl | |
| parent | 7a480fd995e279dd883b9e4e24741f9c71d66143 (diff) | |
clk: zynqmp: Add gem rx and tsu clocks to return register
Add gem_tsu and gem0_rx till gem3_rx to return proper register from
zynqmp_clk_get_register. Otherwise firmware won't be able to set clock
for these due to incorrect register address.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
Diffstat (limited to 'scripts/checkstack.pl')
0 files changed, 0 insertions, 0 deletions