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| author | Naresh Kumar Ravulapalli <[email protected]> | 2025-08-08 02:42:42 -0700 |
|---|---|---|
| committer | Tien Fong Chee <[email protected]> | 2025-09-30 14:29:53 +0800 |
| commit | 63ef1c7a7391e7440bdfbffedd2cc5d9007707cd (patch) | |
| tree | 2294b89db6cfe03fe527c41b7daab6b047cad94b /scripts/checkstack.pl | |
| parent | 5d2ef97c66f0a432c859cfdf64ef696017619ad6 (diff) | |
drivers: ddr: altera: Correct DDR calibration status check
Bit 3 of the seq2core register is no longer set to indicate
calibration completion. Instead, added polling of the seq2core
register until it reads 0b00000111, signaling that the Nios
processor has started the calibration process.
Signed-off-by: Naresh Kumar Ravulapalli <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
Diffstat (limited to 'scripts/checkstack.pl')
0 files changed, 0 insertions, 0 deletions