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| author | Heinrich Schuchardt <[email protected]> | 2023-07-21 18:01:18 +0200 |
|---|---|---|
| committer | Leo Yu-Chi Liang <[email protected]> | 2023-07-24 13:22:24 +0800 |
| commit | 6aabe229f8440c4960b904baf3aa33f692eea9a1 (patch) | |
| tree | 5a7314ebcc2d425d78126de4cd7eed11d716b5ce /scripts/checkstack.pl | |
| parent | 90704967947817eecf6170daa3cea723e3110f8a (diff) | |
riscv: define a cache line size for the generic CPU
The USB 3.0 driver xhci-mem.c requires CONFIG_SYS_CACHELINE_SIZE to be set.
Define the cache line size for QEMU on RISC-V to be 64 bytes.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Diffstat (limited to 'scripts/checkstack.pl')
0 files changed, 0 insertions, 0 deletions