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authorPali Rohár <[email protected]>2021-08-09 09:53:13 +0200
committerStefan Roese <[email protected]>2021-08-11 08:42:26 +0200
commit4cd61c43fd513a8a0558db2d0d237d612e2d5e73 (patch)
tree81456fc9f8a5ecbe9b697815537158fb30f17ca5 /scripts/cleanpatch
parent7940d9628a0b70c09efbcb04cb6af10bc7dd9fea (diff)
arm: a37xx: pci: Fix handling PIO config error responses
Returning fabricated CRS value (0xFFFF0001) by PCIe Root Complex to OS is allowed only for 4-byte PCI_VENDOR_ID config read request and only when CRSSVE bit in Root Port PCIe device is enabled. In all other error PCIe Root Complex must return all-ones. So implement this logic in pci-aardvark.c driver properly. aardvark HW does not have Root Port PCIe device and U-Boot does not implement emulation of this device. So expect that CRSSVE bit is set as U-Boot can already handle CRS value for PCI_VENDOR_ID config read request. More callers of pci_bus_read_config() function in U-Boot do not check for return value, but check readback value. Therefore always fill readback value in pcie_advk_read_config() function. On error fill all-ones of correct size as it is required for PCIe Root Complex. And also correctly propagates error from failed config write request to return value of pcie_advk_write_config() function. Most U-Boot callers ignores this return value, but it is a good idea to return correct value from function. These issues about return value of failed config read requests, including special handling of CRS were reported by Lorenzo and Bjorn for Linux kernel driver pci-aardvark together with quotes from PCIe r4.0 spec, see details: https://lore.kernel.org/linux-pci/[email protected]/t/#u Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
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