board: ti: am57xx: Update EMIF SDRAM 1 and 3 Timings

Update EMIF data based on recommendations from the now standard TI
EMIF tool version 1.1.1 based on 256MBx16 DDR3L Kingston D2516EC4BXGGB
data sheet

Update T_RRD from 5 to 6 based on AM57xx TRM -
Minimum number of DDR cycles from activate to ativate for a different
bank, minus 1.

Update T_CKESR from 4 to 3 based on AM57xx TRM - Minimum number of DDR
clocks cycles for which SDRAM must remain in self refresh, minus 1.

Signed-off-by: Schuyler Patton <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Reviewed-by: Lokesh Vutla <[email protected]>
Reviewed-by: Tom Rini <[email protected]>

0 files changed, 0 insertions, 0 deletions