diff options
| author | Nikita Shubin <[email protected]> | 2022-12-14 08:58:43 +0300 |
|---|---|---|
| committer | Leo Yu-Chi Liang <[email protected]> | 2023-02-01 16:17:13 +0800 |
| commit | 81b56a55c21cf3de3e8faa4de3830a9036bf3e5c (patch) | |
| tree | 71fa3178e46d5e00e95163f4409cbdca4ee093b8 /scripts/cleanpatch | |
| parent | 73a3f5139182a0389d505bf29b0ad4bc29424cf8 (diff) | |
riscv: cpu: check U-Mode before counteren write
The Priv ISA states:
"In systems without U-mode, the mcounteren register should
not exist."
Check U-Mode is present in MISA before writing to counteren, otherwise
we endup with Illegal Instruction exception on systems without U-Mode.
Also make checking MISA default for M-Mode.
Signed-off-by: Nikita Shubin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Diffstat (limited to 'scripts/cleanpatch')
0 files changed, 0 insertions, 0 deletions