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| author | Julien Stephan <[email protected]> | 2026-02-02 13:41:50 +0100 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-02-18 11:59:32 -0600 |
| commit | 6354f83f43f7d2c1b76a17f9b5629a1af7b7916a (patch) | |
| tree | 51dbcb8cdd92a131d2e79a599f521fe582efebcb /scripts/const_structs.checkpatch | |
| parent | a04835c0e929c04403b01b50e1dd966eb42e5004 (diff) | |
clk: mediatek: mt8188: fix circular clock dependency
FACTOR1(CLK_TOP_APLL1_D4, CLK_TOP_APLL1, 1, 3)
--> CLK_TOP_APLL1_D4 declares CLK_TOP_APLL1 as it's parents
MUX_GATE(CLK_TOP_APLL1, apll1_parents, 0x0F8, 0, 4, 7)
--> CLK_TOP_APLL1 declares apll1_parents as it's parents
static const int apll1_parents[] = {
CLK_TOP_CLK26M,
CLK_TOP_APLL1_D4
};
--> CLK_TOP_APLL1_D4 is a parent of CLK_TOP_APLL1
Fix this, by correctly setting CLK_TOP_APLL1_DX parent to CLK_APMIXED_APLLX
Signed-off-by: Julien Stephan <[email protected]>
Diffstat (limited to 'scripts/const_structs.checkpatch')
0 files changed, 0 insertions, 0 deletions