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| author | Pranav Tilak <[email protected]> | 2026-04-10 15:00:17 +0530 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2026-04-23 11:49:48 +0200 |
| commit | 0443deb4285fd06d0db60f7660ff352bc71840e7 (patch) | |
| tree | d12f9bce841759afae9a3a3de27e89a0c5be43d5 /scripts/decodecode | |
| parent | 8342f575796522395b91dbb5484a741e7a2004f2 (diff) | |
net: zynq_gem: set 128-bit AXI bus width for 10GBE
Set 128-bit AXI bus width in network config for 10GBE. The default 64-bit
setting causes DMA data corruption.
Signed-off-by: Pranav Tilak <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'scripts/decodecode')
0 files changed, 0 insertions, 0 deletions