clk: mediatek: mt7622: fix infracfg and pericfg clock operations

The MT7622 infracfg and pericfg drivers both use
mtk_common_clk_infrasys_init() for probe, which populates struct
mtk_clk_priv and stores gate definitions in the clk_tree. However,
both drivers were incorrectly wired to mtk_clk_gate_ops which expects
struct mtk_cg_priv with separately populated gates/num_gates/gates_offs
fields from mtk_common_clk_gate_init().

Since those fields were never set, any attempt to enable an infracfg or
pericfg gate clock (e.g. CLK_INFRA_TRNG) would fail with -EINVAL.

Switch both to mtk_clk_infrasys_ops and struct mtk_clk_priv to match
the init function.

Fixes: 72ab603b201 ("clk: mediatek: add driver for MT7622")
Signed-off-by: Daniel Golle <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Signed-off-by: David Lechner <[email protected]>

0 files changed, 0 insertions, 0 deletions