arm64: mvebu: Add L3 cache flush functionality to A8K family

Add missing L3 cache flush functionality which absence prevents
Linux kernel from normal boot in case the L3 cache is enabled
by ATF.
The L3 cache is named the "last level" cache in order to keep
the terminology similar to the ATF code.
This cache should not be disabled by u-boot since the Linux
kernel cannot activate it, so it is activates at ATF stage.
However the cache flush is required for preventing data corruption
after disabling the MMU and the data cache before passing control
to the loaded Linux image.

Signed-off-by: Konstantin Porotchkin <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Nadav Haklai <[email protected]>
Cc: Neta Zur Hershkovits <[email protected]>
Cc: Omri Itach <[email protected]>
Cc: Igal Liberman <[email protected]>
Cc: Haim Boot <[email protected]>
Cc: Hanna Hawa <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>

0 files changed, 0 insertions, 0 deletions