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| author | Samuel Holland <[email protected]> | 2021-08-16 23:56:47 -0500 |
|---|---|---|
| committer | Andre Przywara <[email protected]> | 2022-04-04 23:24:01 +0100 |
| commit | 29babfd92b25883ce45f294b8eeacc04113389e7 (patch) | |
| tree | c142749b09f4bf6f2d1bc6a11262a536171d6cc9 /scripts | |
| parent | b799eabc7ee3086a708297d2309ebfe0be9adb68 (diff) | |
sunxi: pinctrl: Implement pin muxing functions
Implement the operations to get pin and function names, and to set the
mux for a pin. The pin count and pin names are calculated as if each
bank has the maximum number of pins. Function names are simply the index
into a list of { function name, mux value } pairs.
We assume all pins associated with a function use the same mux value for
that function. This is generally true within a group of pins on a single
port, but generally false when some peripheral can be muxed to multiple
ports. For example, A64 UART3 uses mux 3 on port D, and mux 2 on port H.
But all of the port D pins use the same mux value, and so do all of the
port H pins. This applies even when the pins for some function are not
contiguous, and when the lower-numbered mux values are unused. A good
example of both of these cases is SPI0 on most SoCs.
This strategy saves a lot of space (which is especially important for
SPL), but where the mux value for a certain function differs across
ports, it forces us to choose a single port for that function at build
time. Since almost all boards use the default (i.e. reference design)
pin muxes[1], this is unlikely to be a problem.
[1]: See commit dda9fa734f81 ("sunxi: Simplify MMC pinmux selection")
Signed-off-by: Samuel Holland <[email protected]>
[Andre: add comment summarising the commit message]
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions
