diff options
| author | Marek Vasut <[email protected]> | 2020-04-22 13:18:14 +0200 |
|---|---|---|
| committer | Patrick Delaunay <[email protected]> | 2020-05-14 09:02:12 +0200 |
| commit | 2d68365da17b7dc45543daaa9c5010c11332ba09 (patch) | |
| tree | 62db4764741b0e16415bf1bc12acbdea7f8aba24 /scripts | |
| parent | a8c97f4a00fb5a9a31970351fce4355d37d19c7d (diff) | |
ARM: stm32: Implement DDR3 coding on DHCOR SoM
The DHCOR board does exist in multiple variants with different DDR3
DRAM sizes. To cater for all of them, implement DDR3 code handling.
There are two GPIOs which code the DRAM size populated on the SoM,
read them out and use the value to pick the correct DDR3 config.
Reviewed-by: Patrick Delaunay <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Cc: Manivannan Sadhasivam <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: Patrice Chotard <[email protected]>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions
