diff options
| author | Kever Yang <[email protected]> | 2017-07-27 12:54:01 +0800 |
|---|---|---|
| committer | Philipp Tomsich <[email protected]> | 2017-08-13 17:15:09 +0200 |
| commit | 3a94d75d0e2a3b2519de51dfa1f369d976d9cccc (patch) | |
| tree | 97eceee91df5dd3414f899062ec64041bf7257ed /scripts | |
| parent | 95ca100ba740283e00f0b5354be8ccb04b97cbf9 (diff) | |
rockchip: clk: update dwmmc clock div
dwmmc controller has default internal divider by 2,
and we always provide double of the clock rate request by
dwmmc controller. Sync code for all Rockchip SoC with:
4055b46 rockchip: clk: rk3288: fix mmc clock setting
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
[fixup for 'missing DIV_ROUND_UP' conflict for clk_rk3288.c:]
Signed-off-by: Philipp Tomsich <[email protected]>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions