spi: cadence_qspi_apb: Make flash writes 32 bit aligned

Make flash writes 32 bit aligned by using bounce buffers to deal with
non 32 bit aligned buffers.
This is required because as per TI K2G TRM[1], the external master is
only permitted to issue 32-bit data interface writes until the last word
of an indirect transfer. Otherwise indirect writes is known to fail
sometimes.

[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf

Signed-off-by: Vignesh R <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Acked-by: Simon Goldschmidt <[email protected]>
Reviewed-by: Jason Rush <[email protected]>
Acked-by: Jason Rush <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>

0 files changed, 0 insertions, 0 deletions