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| author | [email protected] <[email protected]> | 2017-01-30 11:35:04 -0800 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2017-02-08 15:56:30 -0500 |
| commit | d5ce3574619d6814ea095a798702e342d45203d4 (patch) | |
| tree | 29505cad383e11e624d7fa6c94350344d29f3307 /scripts | |
| parent | e163a931af34ba06d11b98707b69b8819e353257 (diff) | |
aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation
Fix H-PLL and M-PLL rate calculation in ast2500 clock driver.
Without this fix, valid setting can lead to division by zero
when requesting the rate of H-PLL or M-PLL clocks.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions