Merge tag 'clk-2024.01-rc5' of https://source.denx.de/u-boot/custodians/u-boot-clk

clock changes for u-boot/master

This has some clock fixes which should go in before the release. It's a bit
late in the cycle, but most of these have tests to go along with them.

Signed-off-by: Sean Anderson <[email protected]>

1 files changed, 20 insertions, 2 deletions

diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c
index e4ebb93cdad..61dad8d8527 100644
--- a/test/dm/clk_ccf.c
+++ b/test/dm/clk_ccf.c
@@ -19,16 +19,18 @@
 static int dm_test_clk_ccf(struct unit_test_state *uts)
 {
 	struct clk *clk, *pclk;
-	struct udevice *dev;
+	struct udevice *dev, *test_dev;
 	long long rate;
 	int ret;
 #if CONFIG_IS_ENABLED(CLK_CCF)
+	struct clk clk_ccf;
 	const char *clkname;
 	int clkid, i;
 #endif
 
 	/* Get the device using the clk device */
 	ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-ccf", &dev));
+	ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &test_dev));
 
 	/* Test for clk_get_by_id() */
 	ret = clk_get_by_id(SANDBOX_CLK_ECSPI_ROOT, &clk);
@@ -63,6 +65,9 @@ static int dm_test_clk_ccf(struct unit_test_state *uts)
 	rate = clk_get_parent_rate(clk);
 	ut_asserteq(rate, 60000000);
 
+	rate = clk_set_rate(clk, 60000000);
+	ut_asserteq(rate, -ENOSYS);
+
 	rate = clk_get_rate(clk);
 	ut_asserteq(rate, 60000000);
 
@@ -87,6 +92,9 @@ static int dm_test_clk_ccf(struct unit_test_state *uts)
 	ut_asserteq_str("pll3_80m", pclk->dev->name);
 	ut_asserteq(CLK_SET_RATE_PARENT, pclk->flags);
 
+	rate = clk_set_rate(clk, 80000000);
+	ut_asserteq(rate, -ENOSYS);
+
 	rate = clk_get_rate(clk);
 	ut_asserteq(rate, 80000000);
 
@@ -108,13 +116,23 @@ static int dm_test_clk_ccf(struct unit_test_state *uts)
 	rate = clk_get_rate(clk);
 	ut_asserteq(rate, 60000000);
 
+	rate = clk_set_rate(clk, 60000000);
+	ut_asserteq(rate, 60000000);
+
 #if CONFIG_IS_ENABLED(CLK_CCF)
 	/* Test clk tree enable/disable */
+
+	ret = clk_get_by_index(test_dev, SANDBOX_CLK_TEST_ID_I2C_ROOT, &clk_ccf);
+	ut_assertok(ret);
+	ut_asserteq_str("clk-ccf", clk_ccf.dev->name);
+	ut_asserteq(clk_ccf.id, SANDBOX_CLK_I2C_ROOT);
+
 	ret = clk_get_by_id(SANDBOX_CLK_I2C_ROOT, &clk);
 	ut_assertok(ret);
 	ut_asserteq_str("i2c_root", clk->dev->name);
+	ut_asserteq(clk->id, SANDBOX_CLK_I2C_ROOT);
 
-	ret = clk_enable(clk);
+	ret = clk_enable(&clk_ccf);
 	ut_assertok(ret);
 
 	ret = sandbox_clk_enable_count(clk);