Merge tag 'u-boot-imx-20220726' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220726
-------------------

i.MX for 2022.10

- Added i.MX93 architecture

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12891

3 files changed, 204 insertions, 23 deletions

diff --git a/tools/Kconfig b/tools/Kconfig
index 117c921da3f..539708f277b 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -98,4 +98,63 @@ config TOOLS_MKEFICAPSULE
 	  optionally sign that file. If you want to enable UEFI capsule
 	  update feature on your target, you certainly need this.
 
+menuconfig FSPI_CONF_HEADER
+	bool "FlexSPI Header Configuration"
+	help
+	  FSPI Header Configuration
+
+config FSPI_CONF_FILE
+	string "FlexSPI Header File"
+	depends on FSPI_CONF_HEADER
+	help
+	  FlexSPI Header File name
+
+config READ_CLK_SOURCE
+	hex "Sampling Clock Source"
+	default 0x00
+	depends on FSPI_CONF_HEADER
+	help
+	  Sample Clock source for Flash, default is internal loopback clock
+
+config DEVICE_TYPE
+	hex "Flash Type"
+	default 0x01
+	depends on FSPI_CONF_HEADER
+	help
+	  Flash type: Serial NOR (0X01) and Serial NAND (0x02)
+
+config FLASH_PAD_TYPE
+	hex "Flash Pad Type"
+	default 0x01
+	depends on FSPI_CONF_HEADER
+	help
+	  Flash Pad type :
+	  Single Pad 0x01
+	  Dual Pads  0x02
+	  Quad Pad   0x04
+	  Octal Pad  0x08
+
+config SERIAL_CLK_FREQUENCY
+	hex "Serial Clock Frequency"
+	default 0x02
+	depends on FSPI_CONF_HEADER
+	help
+	  Chip specific frequency: other value 30MHz
+	  1-30MHz  2-50MHz 3-60MHz 4-75MHz 5-80MHz 6-100MHz 7-133MHz 8-166MHz
+
+config LUT_CUSTOM_SEQUENCE
+	hex "Enable Custom Look Up Table(LUT) Sequence"
+	default 0x00
+	depends on FSPI_CONF_HEADER
+	help
+	  0 - Use predefined LUT Sequence
+	  1 - Use LUT Sequence provided
+
+config LUT_SEQUENCE
+	string "Look Up Table Sequence"
+	default "0x0b, 0x04, 0x18, 0x08, 0x08, 0x30, 0x04, 0x24"
+	depends on FSPI_CONF_HEADER
+	help
+	  Look Up Table Sequence
+
 endmenu
diff --git a/tools/imx8image.c b/tools/imx8image.c
index fa8f2274876..01e14869114 100644
--- a/tools/imx8image.c
+++ b/tools/imx8image.c
@@ -60,6 +60,7 @@ static table_entry_t imx8image_core_entries[] = {
 	{CFG_M40,	"M40",			"M4 core 0",	},
 	{CFG_M41,	"M41",			"M4 core 1",	},
 	{CFG_A35,	"A35",			"A35 core",	},
+	{CFG_A55,	"A55",			"A55 core",	},
 	{CFG_A53,	"A53",			"A53 core",	},
 	{CFG_A72,	"A72",			"A72 core",	},
 	{-1,		"",			"",		},
@@ -117,6 +118,10 @@ static void parse_cfg_cmd(image_t *param_stack, int32_t cmd, char *token,
 			soc = QX;
 		} else if (!strncmp(token, "IMX8QM", 6)) {
 			soc = QM;
+		} else if (!strncmp(token, "ULP", 3)) {
+			soc = IMX9;
+		} else if (!strncmp(token, "IMX9", 4)) {
+			soc = IMX9;
 		} else {
 			fprintf(stderr, "Unknown CMD_SOC_TYPE");
 			exit(EXIT_FAILURE);
@@ -187,6 +192,7 @@ static void parse_cfg_fld(image_t *param_stack, int32_t *cmd, char *token,
 			param_stack[p_idx].filename = token;
 			break;
 		case CFG_A35:
+		case CFG_A55:
 			param_stack[p_idx].ext = CORE_CA35;
 			param_stack[p_idx].option =
 				(*cmd == CMD_DATA) ? DATA : AP;
@@ -219,6 +225,7 @@ static void parse_cfg_fld(image_t *param_stack, int32_t *cmd, char *token,
 		case CFG_M41:
 		case CFG_A35:
 		case CFG_A53:
+		case CFG_A55:
 		case CFG_A72:
 			param_stack[p_idx++].entry =
 				(uint32_t)strtoll(token, NULL, 0);
@@ -548,6 +555,18 @@ static void set_image_array_entry(flash_header_v3_t *container,
 		img->dst = 0x20C00000;
 		img->entry = 0x20000000;
 		break;
+	case SENTINEL:
+		if (container->num_images > 0) {
+			fprintf(stderr, "Error: SENTINEL container only allows 1 image\n");
+			return;
+		}
+
+		img->hab_flags |= IMG_TYPE_SENTINEL;
+		img->hab_flags |= CORE_ULP_SENTINEL << BOOT_IMG_FLAGS_CORE_SHIFT;
+		tmp_name = "SENTINEL";
+		img->dst = 0xe4000000; /* S400 IRAM base */
+		img->entry = 0xe4000000;
+		break;
 	case AP:
 		if (soc == QX && core == CORE_CA35) {
 			meta = IMAGE_A35_DEFAULT_META(custom_partition);
@@ -555,6 +574,8 @@ static void set_image_array_entry(flash_header_v3_t *container,
 			meta = IMAGE_A53_DEFAULT_META(custom_partition);
 		} else if (soc == QM && core == CORE_CA72) {
 			meta = IMAGE_A72_DEFAULT_META(custom_partition);
+		} else if (((soc == ULP) || (soc == IMX9)) && core == CORE_CA35) {
+			meta = 0;
 		} else {
 			fprintf(stderr,
 				"Error: invalid AP core id: %" PRIu64 "\n",
@@ -562,8 +583,10 @@ static void set_image_array_entry(flash_header_v3_t *container,
 			exit(EXIT_FAILURE);
 		}
 		img->hab_flags |= IMG_TYPE_EXEC;
-		/* On B0, only core id = 4 is valid */
-		img->hab_flags |= CORE_CA53 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		if ((soc == ULP) || (soc == IMX9))
+			img->hab_flags |= CORE_ULP_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		else
+			img->hab_flags |= CORE_CA53 << BOOT_IMG_FLAGS_CORE_SHIFT; /* On B0, only core id = 4 is valid */
 		tmp_name = "AP";
 		img->dst = entry;
 		img->entry = entry;
@@ -572,17 +595,22 @@ static void set_image_array_entry(flash_header_v3_t *container,
 		break;
 	case M40:
 	case M41:
-		if (core == 0) {
-			core = CORE_CM4_0;
-			meta = IMAGE_M4_0_DEFAULT_META(custom_partition);
-		} else if (core == 1) {
-			core = CORE_CM4_1;
-			meta = IMAGE_M4_1_DEFAULT_META(custom_partition);
+		if ((soc == ULP) || (soc == IMX9)) {
+			core = CORE_ULP_CM33;
+			meta = 0;
 		} else {
-			fprintf(stderr,
-				"Error: invalid m4 core id: %" PRIu64 "\n",
-				core);
-			exit(EXIT_FAILURE);
+			if (core == 0) {
+				core = CORE_CM4_0;
+				meta = IMAGE_M4_0_DEFAULT_META(custom_partition);
+			} else if (core == 1) {
+				core = CORE_CM4_1;
+				meta = IMAGE_M4_1_DEFAULT_META(custom_partition);
+			} else {
+				fprintf(stderr,
+					"Error: invalid m4 core id: %" PRIu64 "\n",
+					core);
+				exit(EXIT_FAILURE);
+			}
 		}
 		img->hab_flags |= IMG_TYPE_EXEC;
 		img->hab_flags |= core << BOOT_IMG_FLAGS_CORE_SHIFT;
@@ -598,7 +626,14 @@ static void set_image_array_entry(flash_header_v3_t *container,
 		break;
 	case DATA:
 		img->hab_flags |= IMG_TYPE_DATA;
-		img->hab_flags |= CORE_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		if ((soc == ULP) || (soc == IMX9)) {
+			if (core == CORE_CM4_0)
+				img->hab_flags |= CORE_ULP_CM33 << BOOT_IMG_FLAGS_CORE_SHIFT;
+			else
+				img->hab_flags |= CORE_ULP_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		} else {
+			img->hab_flags |= CORE_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT;
+		}
 		tmp_name = "DATA";
 		img->dst = entry;
 		break;
@@ -630,6 +665,15 @@ static void set_image_array_entry(flash_header_v3_t *container,
 			img->dst = img->entry - 1;
 		}
 		break;
+	case UPOWER:
+		if (soc == ULP) {
+			img->hab_flags |= IMG_TYPE_EXEC;
+			img->hab_flags |= CORE_ULP_UPOWER << BOOT_IMG_FLAGS_CORE_SHIFT;
+			tmp_name = "UPOWER";
+			img->dst = 0x28300200; /* UPOWER code RAM */
+			img->entry = 0x28300200;
+		}
+		break;
 	default:
 		fprintf(stderr, "unrecognized image type (%d)\n", type);
 		exit(EXIT_FAILURE);
@@ -797,6 +841,10 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 		fprintf(stdout, "Platform:\ti.MX8QXP B0\n");
 	else if (soc == QM)
 		fprintf(stdout, "Platform:\ti.MX8QM B0\n");
+	else if (soc == ULP)
+		fprintf(stdout, "Platform:\ti.MX8ULP A0\n");
+	else if (soc == IMX9)
+		fprintf(stdout, "Platform:\ti.MX9\n");
 
 	set_imx_hdr_v3(&imx_header, 0);
 	set_imx_hdr_v3(&imx_header, 1);
@@ -815,6 +863,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 		case M41:
 		case SCFW:
 		case DATA:
+		case UPOWER:
 		case MSG_BLOCK:
 			if (container < 0) {
 				fprintf(stderr, "No container found\n");
@@ -833,6 +882,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 			break;
 
 		case SECO:
+		case SENTINEL:
 			if (container < 0) {
 				fprintf(stderr, "No container found\n");
 				exit(EXIT_FAILURE);
@@ -941,7 +991,8 @@ static int build_container(soc_type_t soc, uint32_t sector_size,
 		if (img_sp->option == M40 || img_sp->option == M41 ||
 		    img_sp->option == AP || img_sp->option == DATA ||
 		    img_sp->option == SCD || img_sp->option == SCFW ||
-		    img_sp->option == SECO || img_sp->option == MSG_BLOCK) {
+		    img_sp->option == SECO || img_sp->option == MSG_BLOCK ||
+		    img_sp->option == UPOWER || img_sp->option == SENTINEL) {
 			copy_file_aligned(ofd, img_sp->filename, img_sp->src,
 					  sector_size);
 		}
diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c
index 4eed683396f..a4699decf92 100644
--- a/tools/imx8mimage.c
+++ b/tools/imx8mimage.c
@@ -120,7 +120,6 @@ static void parse_cfg_cmd(int32_t cmd, char *token, char *name, int lineno)
 			rom_version = ROM_V1;
 		}
 		break;
-
 	}
 }
 
@@ -412,9 +411,75 @@ static void dump_header_v2(imx_header_v3_t *imx_header, int index)
 		imx_header[index].boot_data.plugin);
 }
 
+#ifdef CONFIG_FSPI_CONF_HEADER
+static int generate_fspi_header (int ifd)
+{
+	int ret, i = 0;
+	char *val;
+	char lut_str[] = CONFIG_LUT_SEQUENCE;
+
+	fspi_conf fspi_conf_data = {
+	.tag = {0x46, 0x43, 0x46, 0x42},
+	.version = {0x00, 0x00, 0x01, 0x56},
+	.reserved_1 = {0x00, 0x00, 0x00, 0x00},
+	.read_sample = CONFIG_READ_CLK_SOURCE,
+	.datahold =  0x03,
+	.datasetup = 0x03,
+	.coladdrwidth = 0x00,
+	.devcfgenable = 0x00,
+	.reserved_2 = {0x00, 0x00, 0x00},
+	.devmodeseq =  {0x00, 0x00, 0x00, 0x00},
+	.devmodearg =  {0x00, 0x00, 0x00, 0x00},
+	.cmd_enable =  0x00,
+	.reserved_3 = {0x00},
+	.cmd_seq = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+							0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+	.cmd_arg = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+							0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+	.controllermisc = {0x00, 0x00, 0x00, 0x00},
+	.dev_type = CONFIG_DEVICE_TYPE,
+	.sflash_pad = CONFIG_FLASH_PAD_TYPE,
+	.serial_clk = CONFIG_SERIAL_CLK_FREQUENCY,
+	.lut_custom = CONFIG_LUT_CUSTOM_SEQUENCE,
+	.reserved_4 = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+	.sflashA1  =  {0x00, 0x00, 0x00, 0x10},
+	.sflashA2 = {0x00, 0x00, 0x00, 0x00},
+	.sflashB1 = {0x00, 0x00, 0x00, 0x00},
+	.sflashB2 =  {0x00, 0x00, 0x00, 0x00},
+	.cspadover = {0x00, 0x00, 0x00, 0x00},
+	.sclkpadover = {0x00, 0x00, 0x00, 0x00},
+	.datapadover = {0x00, 0x00, 0x00, 0x00},
+	.dqspadover = {0x00, 0x00, 0x00, 0x00},
+	.timeout =  {0x00, 0x00, 0x00, 0x00},
+	.commandInt = {0x00, 0x00, 0x00, 0x00},
+	.datavalid  = {0x00, 0x00, 0x00, 0x00},
+	.busyoffset = {0x00, 0x00},
+	.busybitpolarity = {0x00, 0x00},
+	};
+
+	for (val = strtok(lut_str, ","); val; val = strtok(NULL, ",")) {
+		fspi_conf_data.lut[i++] = strtoul(val, NULL, 16);
+	}
+
+	ret = lseek(ifd, 0, SEEK_CUR);
+	if (write(ifd, &fspi_conf_data, sizeof(fspi_conf_data)) == -1)
+		exit(EXIT_FAILURE);
+
+	ret = lseek(ifd, sizeof(fspi_conf_data), SEEK_CUR);
+
+	return ret;
+}
+#endif
+
 void build_image(int ofd)
 {
 	int file_off, header_hdmi_off = 0, header_image_off;
+
+#ifdef CONFIG_FSPI_CONF_HEADER
+	int fspi_off, fspi_fd;
+	char *fspi;
+#endif
+
 	int hdmi_fd, ap_fd, sld_fd;
 	uint32_t sld_load_addr = 0;
 	uint32_t csf_off, sld_csf_off = 0;
@@ -455,6 +520,20 @@ void build_image(int ofd)
 
 	header_image_off = file_off + ivt_offset;
 
+#ifdef CONFIG_FSPI_CONF_HEADER
+	fspi = CONFIG_FSPI_CONF_FILE;
+	fspi_fd = open(fspi, O_RDWR | O_CREAT, S_IRWXU);
+	if (fspi_fd < 0) {
+		fprintf(stderr, "Can't open %s: %s\n",
+			fspi, strerror(errno));
+		exit(EXIT_FAILURE);
+	}
+
+	fspi_off = generate_fspi_header(fspi_fd);
+	file_off = header_image_off + fspi_off;
+	close(fspi_fd);
+
+#endif
 	ap_fd = open(ap_img, O_RDONLY | O_BINARY);
 	if (ap_fd < 0) {
 		fprintf(stderr, "%s: Can't open: %s\n",
@@ -505,14 +584,6 @@ void build_image(int ofd)
 			exit(EXIT_FAILURE);
 		} else {
 			sld_header_off = sld_src_off - rom_image_offset;
-			/*
-			 * Record the second bootloader relative offset in
-			 * image's IVT reserved1
-			 */
-			if (rom_version == ROM_V1) {
-				imx_header[IMAGE_IVT_ID].fhdr.reserved1 =
-					sld_header_off - header_image_off;
-			}
 			sld_fd = open(sld_img, O_RDONLY | O_BINARY);
 			if (sld_fd < 0) {
 				fprintf(stderr, "%s: Can't open: %s\n",