diff options
| -rw-r--r-- | arch/x86/cpu/lapic.c | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c index 30d23130eba..dbb32c4447d 100644 --- a/arch/x86/cpu/lapic.c +++ b/arch/x86/cpu/lapic.c @@ -65,23 +65,27 @@ void lapic_write(unsigned long reg, unsigned long v) void enable_lapic(void) { - msr_t msr; + if (!IS_ENABLED(CONFIG_INTEL_QUARK)) { + msr_t msr; - msr = msr_read(MSR_IA32_APICBASE); - msr.hi &= 0xffffff00; - msr.lo |= MSR_IA32_APICBASE_ENABLE; - msr.lo &= ~MSR_IA32_APICBASE_BASE; - msr.lo |= LAPIC_DEFAULT_BASE; - msr_write(MSR_IA32_APICBASE, msr); + msr = msr_read(MSR_IA32_APICBASE); + msr.hi &= 0xffffff00; + msr.lo |= MSR_IA32_APICBASE_ENABLE; + msr.lo &= ~MSR_IA32_APICBASE_BASE; + msr.lo |= LAPIC_DEFAULT_BASE; + msr_write(MSR_IA32_APICBASE, msr); + } } void disable_lapic(void) { - msr_t msr; + if (!IS_ENABLED(CONFIG_INTEL_QUARK)) { + msr_t msr; - msr = msr_read(MSR_IA32_APICBASE); - msr.lo &= ~MSR_IA32_APICBASE_ENABLE; - msr_write(MSR_IA32_APICBASE, msr); + msr = msr_read(MSR_IA32_APICBASE); + msr.lo &= ~MSR_IA32_APICBASE_ENABLE; + msr_write(MSR_IA32_APICBASE, msr); + } } unsigned long lapicid(void) |