diff options
77 files changed, 636 insertions, 635 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index e28e4c4bce7..8d63afeb138 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -11,14 +11,14 @@ config HAVE_ARCH_IOREMAP config HAVE_SETJMP bool help - The architecture supports setjmp() and longjmp(). + The architecture supports setjmp() and longjmp(). config HAVE_INITJMP bool depends on HAVE_SETJMP help - The architecture supports initjmp(), a non-standard companion to - setjmp() and longjmp(). + The architecture supports initjmp(), a non-standard companion to + setjmp() and longjmp(). config SUPPORT_BIG_ENDIAN bool @@ -457,11 +457,11 @@ config SYS_CONFIG_NAME config SYS_DISABLE_DCACHE_OPS bool help - This option disables dcache flush and dcache invalidation - operations. For example, on coherent systems where cache - operatios are not required, enable this option to avoid them. - Note that, its up to the individual architectures to implement - this functionality. + This option disables dcache flush and dcache invalidation + operations. For example, on coherent systems where cache + operatios are not required, enable this option to avoid them. + Note that, its up to the individual architectures to implement + this functionality. config SYS_IMMR hex "Address for the Internal Memory-Mapped Registers (IMMR) window" diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8047c5e1f87..1b474a346bf 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -477,30 +477,30 @@ config SYS_THUMB_BUILD bool "Build U-Boot using the Thumb instruction set" depends on !ARM64 help - Use this flag to build U-Boot using the Thumb instruction set for - ARM architectures. Thumb instruction set provides better code - density. For ARM architectures that support Thumb2 this flag will - result in Thumb2 code generated by GCC. + Use this flag to build U-Boot using the Thumb instruction set for + ARM architectures. Thumb instruction set provides better code + density. For ARM architectures that support Thumb2 this flag will + result in Thumb2 code generated by GCC. config SPL_SYS_THUMB_BUILD bool "Build SPL using the Thumb instruction set" default y if SYS_THUMB_BUILD depends on !ARM64 && SPL help - Use this flag to build SPL using the Thumb instruction set for - ARM architectures. Thumb instruction set provides better code - density. For ARM architectures that support Thumb2 this flag will - result in Thumb2 code generated by GCC. + Use this flag to build SPL using the Thumb instruction set for + ARM architectures. Thumb instruction set provides better code + density. For ARM architectures that support Thumb2 this flag will + result in Thumb2 code generated by GCC. config TPL_SYS_THUMB_BUILD bool "Build TPL using the Thumb instruction set" default y if SYS_THUMB_BUILD depends on TPL && !ARM64 help - Use this flag to build TPL using the Thumb instruction set for - ARM architectures. Thumb instruction set provides better code - density. For ARM architectures that support Thumb2 this flag will - result in Thumb2 code generated by GCC. + Use this flag to build TPL using the Thumb instruction set for + ARM architectures. Thumb instruction set provides better code + density. For ARM architectures that support Thumb2 this flag will + result in Thumb2 code generated by GCC. config SYS_L2_PL310 bool "ARM PL310 L2 cache controller" @@ -1583,7 +1583,7 @@ config TARGET_HIKEY select PL01X_SERIAL select SPECIFY_CONSOLE_INDEX imply CMD_DM - help + help Support for HiKey 96boards platform. It features a HI6220 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. @@ -1596,7 +1596,7 @@ config TARGET_HIKEY960 select OF_CONTROL select PL01X_SERIAL imply CMD_DM - help + help Support for HiKey960 96boards platform. It features a HI3660 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM. @@ -1609,7 +1609,7 @@ config TARGET_POPLAR select OF_CONTROL select PL01X_SERIAL imply CMD_DM - help + help Support for Poplar 96boards EE platform. It features a HI3798cv200 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU making it capable of running any commercial set-top solution based on @@ -1667,10 +1667,10 @@ config TARGET_LS1012AFRWY imply SCSI imply SCSI_AHCI help - Support for Freescale LS1012AFRWY platform. - The LS1012A FRWY board (FRWY) is a high-performance - development platform that supports the QorIQ LS1012A - Layerscape Architecture processor. + Support for Freescale LS1012AFRWY platform. + The LS1012A FRWY board (FRWY) is a high-performance + development platform that supports the QorIQ LS1012A + Layerscape Architecture processor. config TARGET_LS1012AFRDM bool "Support ls1012afrdm" @@ -1778,9 +1778,9 @@ config TARGET_PG_WCOM_SELI8 select VENDOR_KM imply SCSI help - Support for Hitachi-Powergrids SELI8 service unit card. - SELI8 is a QorIQ LS1021a based service unit card used - in XMC20 and FOX615 product families. + Support for Hitachi-Powergrids SELI8 service unit card. + SELI8 is a QorIQ LS1021a based service unit card used + in XMC20 and FOX615 product families. config TARGET_PG_WCOM_EXPU1 bool "Support Hitachi-Powergrids EXPU1 service unit card" @@ -1796,9 +1796,9 @@ config TARGET_PG_WCOM_EXPU1 select VENDOR_KM imply SCSI help - Support for Hitachi-Powergrids EXPU1 service unit card. - EXPU1 is a QorIQ LS1021a based service unit card used - in XMC20 and FOX615 product families. + Support for Hitachi-Powergrids EXPU1 service unit card. + EXPU1 is a QorIQ LS1021a based service unit card used + in XMC20 and FOX615 product families. config TARGET_LS1021ATSN bool "Support ls1021atsn" @@ -2180,8 +2180,8 @@ config TARGET_POMELO select DM_SERIAL imply CMD_PCI help - Support for pomelo platform. - It has 8GB Sdram, uart and pcie. + Support for pomelo platform. + It has 8GB Sdram, uart and pcie. config TARGET_PE2201 bool "Support Phytium PE2201 Platform" diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index 3a3c1784e18..18e7aed94d9 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig @@ -13,19 +13,19 @@ config ARMV7_NONSEC bool "Enable support for booting in non-secure mode" if EXPERT depends on CPU_V7_HAS_NONSEC default y - ---help--- - Say Y here to enable support for booting in non-secure / SVC mode. + help + Say Y here to enable support for booting in non-secure / SVC mode. config ARMV7_BOOT_SEC_DEFAULT bool "Boot in secure mode by default" if EXPERT depends on ARMV7_NONSEC default y if ARCH_TEGRA - ---help--- - Say Y here to boot in secure mode by default even if non-secure mode - is supported. This option is useful to boot kernels which do not - suppport booting in non-secure mode. Only set this if you need it. - This can be overridden at run-time by setting the bootm_boot_mode env. - variable to "sec" or "nonsec". + help + Say Y here to boot in secure mode by default even if non-secure mode + is supported. This option is useful to boot kernels which do not + support booting in non-secure mode. Only set this if you need it. + This can be overridden at run-time by setting the bootm_boot_mode env. + variable to "sec" or "nonsec". config HAS_ARMV7_SECURE_BASE bool "Enable support for a hardware secure memory area" @@ -74,8 +74,8 @@ config ARMV7_VIRT bool "Enable support for hardware virtualization" if EXPERT depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC default y - ---help--- - Say Y here to boot in hypervisor (HYP) mode when booting non-secure. + help + Say Y here to boot in hypervisor (HYP) mode when booting non-secure. config ARMV7_PSCI bool "Enable PSCI support" if EXPERT @@ -115,9 +115,9 @@ config ARMV7_LPAE bool "Use LPAE page table format" if EXPERT depends on CPU_V7A default y if ARMV7_VIRT - ---help--- - Say Y here to use the long descriptor page table format. This is - required if U-Boot runs in HYP mode. + help + Say Y here to use the long descriptor page table format. This is + required if U-Boot runs in HYP mode. config ARMV7_SET_CORTEX_SMPEN bool diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 5c8839583aa..9ce94555ed0 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -100,9 +100,9 @@ config SYS_FSL_ERRATUM_A008407 config SYS_FSL_QSPI_SKIP_CLKSEL bool "Skip setting QSPI clock during SoC init" help - To improve startup times when booting from QSPI flash, the QSPI - frequency can be set very early in the boot process. If this option - is enabled, the QSPI frequency will not be changed by U-Boot during - SoC initialization. + To improve startup times when booting from QSPI flash, the QSPI + frequency can be set very early in the boot process. If this option + is enabled, the QSPI frequency will not be changed by U-Boot during + SoC initialization. endmenu diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index dfc4ce851c3..7e4e3bdd66c 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -23,11 +23,11 @@ config ARMV8_SPL_EXCEPTION_VECTORS and want to save some space at the cost of less debugging info. config ARMV8_MULTIENTRY - bool "Enable multiple CPUs to enter into U-Boot" + bool "Enable multiple CPUs to enter into U-Boot" config ARMV8_SET_SMPEN - bool "Enable data coherency with other cores in cluster" - help + bool "Enable data coherency with other cores in cluster" + help Say Y here if there is not any trust firmware to set CPUECTLR_EL1.SMPEN bit before U-Boot. @@ -79,12 +79,12 @@ config ARMV8_SEC_FIRMWARE_SUPPORT process brief. Note: Only FIT format image is supported. You should prepare and provide the below information: - - Address of secure firmware. - - Address to hold the return address from secure firmware. - - Secure firmware FIT image related information. - Such as: SEC_FIRMWARE_FIT_IMAGE and SEC_FIRMWARE_FIT_CNF_NAME - - The target exception level that secure monitor firmware will - return to. + - Address of secure firmware. + - Address to hold the return address from secure firmware. + - Secure firmware FIT image related information. + Such as: SEC_FIRMWARE_FIT_IMAGE and SEC_FIRMWARE_FIT_CNF_NAME + - The target exception level that secure monitor firmware will + return to. config SPL_ARMV8_SEC_FIRMWARE_SUPPORT bool "Enable ARMv8 secure monitor firmware framework support for SPL" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 4c5b38e3b65..2335c776c2e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -440,8 +440,8 @@ config MAX_CPUS config EMC2305 bool "Fan controller" help - Enable the EMC2305 fan controller for configuration of fan - speed. + Enable the EMC2305 fan controller for configuration of fan + speed. config QSPI_AHB_INIT bool "Init the QSPI AHB bus" @@ -548,7 +548,7 @@ config SYS_FSL_PCLK_DIV help This is the divider that is used to derive Platform clock from Platform PLL, in another word: - Platform_clk = Platform_PLL_freq / this_divider + Platform_clk = Platform_PLL_freq / this_divider config SYS_FSL_DSPI_CLK_DIV int "DSPI clock divider" diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 65e9d70f084..19e3ac360dd 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -150,9 +150,9 @@ config TARGET_SAM9X60EK select BOARD_LATE_INIT config TARGET_SAM9X60_CURIOSITY - bool "SAM9X60 CURIOSITY board" - select SAM9X60 - select BOARD_LATE_INIT + bool "SAM9X60 CURIOSITY board" + select SAM9X60 + select BOARD_LATE_INIT config TARGET_SAM9X75_CURIOSITY bool "SAM9X75 CURIOSITY board" @@ -270,9 +270,9 @@ config TARGET_CORVUS imply CMD_DM config TARGET_SAMA7G5EK - bool "SAMA7G5 EK board" - select SAMA7G5 - select BOARD_LATE_INIT + bool "SAMA7G5 EK board" + select SAMA7G5 + select BOARD_LATE_INIT config TARGET_SAMA7G54_CURIOSITY bool "SAMA7G54 CURIOSITY board" diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 66142a835ce..561f1ee044a 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -157,7 +157,7 @@ config CMD_PRIBLOB depends on HAS_CAAM && IMX_HAB help This option enables the priblob command which can be used - to set the priblob setting to 0x3. + to set the priblob setting to 0x3. config CMD_HDMIDETECT bool "Support the 'hdmidet' command" diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index 4bb6a87ce26..0a7a4360eaf 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -1,9 +1,9 @@ if ARCH_IMX9 config AHAB_BOOT - bool "Support i.MX9 AHAB features" - help - This option enables the support for AHAB secure boot. + bool "Support i.MX9 AHAB features" + help + This option enables the support for AHAB secure boot. config IMX9 bool diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 7ed4b24b751..a38adfed02b 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -95,10 +95,10 @@ config MX6_OCRAM_256KB bool "Support 256KB OCRAM" depends on MX6D || MX6Q help - Allows using the full 256KB size of the OCRAM on the MX6Q/MX6D series - of chips, such as for SPL. The OCRAM of the Lite series of chips is - only 128KB, so using this option will prevent the resulting code from - working on those chips. + Allows using the full 256KB size of the OCRAM on the MX6Q/MX6D series + of chips, such as for SPL. The OCRAM of the Lite series of chips is + only 128KB, so using this option will prevent the resulting code from + working on those chips. config MX6_DDRCAL bool "Include dynamic DDR calibration routines" @@ -698,10 +698,10 @@ config TARGET_BRPPT2 select SUPPORT_SPL select SPL_DM if SPL select SPL_OF_CONTROL if SPL - help - Support - B&R BRPPT2 platform - based on Freescale's iMX6 SoC + help + Support + B&R BRPPT2 platform + based on Freescale's iMX6 SoC config TARGET_O4_IMX6ULL_NANO bool "O4-iMX6ULL-NANO" diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig index 9bf71a9b453..82efc9f7c40 100644 --- a/arch/arm/mach-keystone/Kconfig +++ b/arch/arm/mach-keystone/Kconfig @@ -18,9 +18,9 @@ config TARGET_K2L_EVM config TARGET_K2G_EVM bool "TI Keystone 2 Galileo EVM" - select BOARD_LATE_INIT + select BOARD_LATE_INIT select SOC_K2G - select TI_I2C_BOARD_DETECT + select TI_I2C_BOARD_DETECT endchoice diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index f1ccedba5d7..8d56ca1a6e3 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -22,13 +22,13 @@ config KIRKWOOD_COMMON select SYS_NS16550 config HAS_CUSTOM_SYS_INIT_SP_ADDR - bool "Use a custom location for the initial stack pointer address" - default y + bool "Use a custom location for the initial stack pointer address" + default y config CUSTOM_SYS_INIT_SP_ADDR - hex "Static location for the initial stack pointer" - depends on HAS_CUSTOM_SYS_INIT_SP_ADDR - default 0x5ff000 + hex "Static location for the initial stack pointer" + depends on HAS_CUSTOM_SYS_INIT_SP_ADDR + default 0x5ff000 choice prompt "Marvell Kirkwood board select" diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig index 80f7185e929..d6dcd080a9a 100644 --- a/arch/arm/mach-mediatek/Kconfig +++ b/arch/arm/mach-mediatek/Kconfig @@ -45,7 +45,7 @@ config TARGET_MT7981 help The MediaTek MT7981 is a ARM64-based SoC with a dual-core Cortex-A53. including UART, SPI, USB, NAND, SNFI, PWM, Gigabit Ethernet, I2C, - built-in Wi-Fi, and PCIe. + built-in Wi-Fi, and PCIe. config TARGET_MT7986 bool "MediaTek MT7986 SoC" @@ -89,9 +89,9 @@ config TARGET_MT8188 select ARM64 help The MediaTek MT8188 is a ARM64-based SoC with a dual-core Cortex-A78 - cluster and a six-core Cortex-A55 cluster. It includes UART, SPI, - USB3.0 dual role, SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and - several LPDDR3 and LPDDR4 options. + cluster and a six-core Cortex-A55 cluster. It includes UART, SPI, + USB3.0 dual role, SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and + several LPDDR3 and LPDDR4 options. config TARGET_MT8189 bool "MediaTek MT8189 SoC" @@ -120,13 +120,13 @@ config TARGET_MT8365 I2C, I2S, S/PDIF, and several LPDDR3 and LPDDR4 options. config TARGET_MT8512 - bool "MediaTek MT8512 SoC" - select ARM64 - help - The MediaTek MT8512 is a ARM64-based SoC with a dual-core Cortex-A53. - including UART, SPI, USB2.0 and OTG, SD and MMC cards, NAND, PWM, - IR RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth digital - and several LPDDR3 and LPDDR4 options. + bool "MediaTek MT8512 SoC" + select ARM64 + help + The MediaTek MT8512 is a ARM64-based SoC with a dual-core Cortex-A53. + including UART, SPI, USB2.0 and OTG, SD and MMC cards, NAND, PWM, + IR RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth digital + and several LPDDR3 and LPDDR4 options. config TARGET_MT8516 bool "MediaTek MT8516 SoC" @@ -154,7 +154,7 @@ config MTK_MEM_MAP_DDR_BASE_PHY hex "DDR physical base address" default 0x40000000 help - Target-specific DDR physical base address. + Target-specific DDR physical base address. config MTK_MEM_MAP_DDR_SIZE hex "DDR .size in mem_map" @@ -164,14 +164,14 @@ config MTK_MEM_MAP_DDR_SIZE default 0x40000000 if TARGET_MT7622 || TARGET_MT8512 default 0x20000000 help - Target-specific DDR region size in mem_map. + Target-specific DDR region size in mem_map. config MTK_MEM_MAP_MMIO_SIZE hex "MMIO .size in mem_map" default 0x40000000 if TARGET_MT7622 || TARGET_MT7981 || TARGET_MT7986 || TARGET_MT7987 || TARGET_MT7988 || TARGET_MT8512 default 0x20000000 help - Target-specific MMIO region size in mem_map. + Target-specific MMIO region size in mem_map. endif diff --git a/arch/arm/mach-omap2/omap5/Kconfig b/arch/arm/mach-omap2/omap5/Kconfig index 5394529658b..2a96a8418e2 100644 --- a/arch/arm/mach-omap2/omap5/Kconfig +++ b/arch/arm/mach-omap2/omap5/Kconfig @@ -64,7 +64,7 @@ config OMAP_PLATFORM_RESET_TIME_MAX_USEC 1: Time taken by the Osciallator to stop and restart 2: PMIC OTP time 3: Voltage ramp time, which can be derived using the PMIC slew rate - and value of voltage ramp needed. + and value of voltage ramp needed. if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM menu "Voltage Domain OPP selections" @@ -72,7 +72,7 @@ menu "Voltage Domain OPP selections" choice prompt "MPU Voltage Domain" default DRA7_MPU_OPP_NOM - help + help Select the Operating Performance Point(OPP) for the MPU voltage domain on DRA7xx & AM57xx SoCs. @@ -86,7 +86,7 @@ endchoice choice prompt "DSPEVE Voltage Domain" - help + help Select the Operating Performance Point(OPP) for the DSPEVE voltage domain on DRA7xx & AM57xx SoCs. @@ -110,7 +110,7 @@ endchoice choice prompt "IVA Voltage Domain" - help + help Select the Operating Performance Point(OPP) for the IVA voltage domain on DRA7xx & AM57xx SoCs. @@ -134,7 +134,7 @@ endchoice choice prompt "GPU Voltage Domain" - help + help Select the Operating Performance Point(OPP) for the GPU voltage domain on DRA7xx & AM57xx SoCs. diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig index 76d3998884d..4d1bfb778ee 100644 --- a/arch/arm/mach-owl/Kconfig +++ b/arch/arm/mach-owl/Kconfig @@ -1,21 +1,21 @@ if ARCH_OWL choice - prompt "Actions Semi Owl SoC Variant" + prompt "Actions Semi Owl SoC Variant" optional config MACH_S900 - bool "Actions Semi S900 SoC" - select ARM64 + bool "Actions Semi S900 SoC" + select ARM64 config MACH_S700 - bool "Actions Semi S700 SoC" - select ARM64 + bool "Actions Semi S700 SoC" + select ARM64 endchoice config TEXT_BASE - default 0x11000000 + default 0x11000000 config SYS_CONFIG_NAME default "owl-common" diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index d92fcae2bb5..1a2e7847c9e 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -607,8 +607,8 @@ config SPL_ROCKCHIP_BACK_TO_BROM depends on SPL help Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, - SPL will return to the boot rom, which will then load the U-Boot - binary to keep going on. + SPL will return to the boot rom, which will then load the U-Boot + binary to keep going on. config TPL_ROCKCHIP_BACK_TO_BROM bool "TPL returns to bootrom" @@ -618,8 +618,8 @@ config TPL_ROCKCHIP_BACK_TO_BROM depends on TPL help Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, - SPL will return to the boot rom, which will then load the U-Boot - binary to keep going on. + SPL will return to the boot rom, which will then load the U-Boot + binary to keep going on. config ROCKCHIP_COMMON_BOARD bool "Rockchip common board file" @@ -661,7 +661,7 @@ config ROCKCHIP_BOOT_MODE_REG config ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON bool "Disable device boot on power plug-in" depends on PMIC_RK8XX - ---help--- + help Say Y here to prevent the device from booting up because of a plug-in event. When set, the device will boot briefly to determine why it was powered on, and if it was determined because of a plug-in event @@ -689,7 +689,7 @@ config ROCKCHIP_BROM_HELPER bool config SPL_ROCKCHIP_EARLYRETURN_TO_BROM - bool "SPL requires early-return (for RK3188-style BROM) to BROM" + bool "SPL requires early-return (for RK3188-style BROM) to BROM" depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK help Some Rockchip BROM variants (e.g. on the RK3188) load the @@ -710,7 +710,7 @@ config ROCKCHIP_DISABLE_FORCE_JTAG Rockchip SoCs can automatically switch between jtag and sdmmc based on the following rules: - all the SDMMC pins including SDMMC_DET set as SDMMC function in - GRF, + GRF, - force_jtag bit in GRF is 1, - SDMMC_DET is low (no card detected), @@ -727,7 +727,7 @@ config ROCKCHIP_DISABLE_FORCE_JTAG If unsure, say Y. config TPL_ROCKCHIP_EARLYRETURN_TO_BROM - bool "TPL requires early-return (for RK3188-style BROM) to BROM" + bool "TPL requires early-return (for RK3188-style BROM) to BROM" depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK help Some Rockchip BROM variants (e.g. on the RK3188) load the diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig index 2b57b166894..adba1b49a52 100644 --- a/arch/arm/mach-rockchip/px30/Kconfig +++ b/arch/arm/mach-rockchip/px30/Kconfig @@ -18,7 +18,7 @@ config TARGET_PX30_CORE * PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. * EDIMM2.2 is a Form Factor Capacitive Evaluation Board from Engicam. * PX30.Core needs to mount on top of EDIMM2.2 for creating complete - PX30.Core EDIMM2.2 Starter Kit. + PX30.Core EDIMM2.2 Starter Kit. PX30.Core CTOUCH2: * PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. @@ -39,7 +39,7 @@ config TARGET_RINGNECK_PX30 bool "Theobroma Systems PX30-uQ7 (Ringneck)" help The PX30-uQ7 (Ringneck) SoM is a uQseven-compatible (40mmx70mm, - MXM-230 connector) system-on-module from Theobroma Systems[1], + MXM-230 connector) system-on-module from Theobroma Systems[1], featuring the Rockchip PX30. It provides the following feature set: diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig index 9ad1f54055b..ba694093990 100644 --- a/arch/arm/mach-rockchip/rk322x/Kconfig +++ b/arch/arm/mach-rockchip/rk322x/Kconfig @@ -27,10 +27,10 @@ config SPL_SERIAL default y config TPL_STACK - default 0x10088000 + default 0x10088000 config TPL_TEXT_BASE - default 0x10081000 + default 0x10081000 source "board/rockchip/evb_rk3229/Kconfig" diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 128ee362f8a..91e11910876 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -91,7 +91,7 @@ config TARGET_MIQI_RK3288 config TARGET_PHYCORE_RK3288 bool "phyCORE-RK3288" - select BOARD_LATE_INIT + select BOARD_LATE_INIT help Add basic support for the PCM-947 carrier board, a RK3288 based development board made by PHYTEC. This board works in a combination @@ -128,7 +128,7 @@ config TARGET_ROCK2 config TARGET_TINKER_RK3288 bool "Tinker-RK3288" - select BOARD_LATE_INIT + select BOARD_LATE_INIT select ROCKCHIP_COMMON_STACK_ADDR select TPL help @@ -173,7 +173,7 @@ config SPL_SERIAL default y config TPL_STACK - default 0xff718000 + default 0xff718000 config TPL_SYS_MALLOC_F_LEN default 0x2000 diff --git a/arch/arm/mach-rockchip/rk3308/Kconfig b/arch/arm/mach-rockchip/rk3308/Kconfig index b8d25c52542..540ddc93cd0 100644 --- a/arch/arm/mach-rockchip/rk3308/Kconfig +++ b/arch/arm/mach-rockchip/rk3308/Kconfig @@ -5,7 +5,7 @@ config TARGET_EVB_RK3308 select BOARD_LATE_INIT config TARGET_ROC_RK3308_CC - bool "Firefly roc-rk3308-cc" + bool "Firefly roc-rk3308-cc" select BOARD_LATE_INIT config ROCKCHIP_BOOT_MODE_REG diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig index a7be30bbd89..6c6ca02c309 100644 --- a/arch/arm/mach-rockchip/rk3368/Kconfig +++ b/arch/arm/mach-rockchip/rk3368/Kconfig @@ -13,14 +13,14 @@ config TARGET_GEEKBOX bool "GeekBox" config TARGET_EVB_PX5 - bool "Evb-PX5" + bool "Evb-PX5" select ARCH_EARLY_INIT_R - help - PX5 EVB is designed by Rockchip for automotive field - with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS - HDMI video input/output interface, audio codec ES8396, - WIFI/BT (on RTL8723BS), Gsensor BMA250E and light&proximity - sensor STK3410. + help + PX5 EVB is designed by Rockchip for automotive field + with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS + HDMI video input/output interface, audio codec ES8396, + WIFI/BT (on RTL8723BS), Gsensor BMA250E and light&proximity + sensor STK3410. endchoice config ROCKCHIP_BOOT_MODE_REG @@ -49,9 +49,9 @@ config SPL_STACK_R_ADDR default 0x04000000 config TPL_STACK - default 0xff8cffff + default 0xff8cffff config TPL_TEXT_BASE - default 0xff8c1000 + default 0xff8c1000 endif diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index 5c21b08a5ae..d84a9da8ed5 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -145,10 +145,10 @@ config TPL_LDSCRIPT default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" config TPL_STACK - default 0xff8effff + default 0xff8effff config TPL_TEXT_BASE - default 0xff8c2000 + default 0xff8c2000 if BOOTCOUNT_LIMIT diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig b/arch/arm/mach-rockchip/rv1126/Kconfig index 43eeaa9c449..d066df9a86e 100644 --- a/arch/arm/mach-rockchip/rv1126/Kconfig +++ b/arch/arm/mach-rockchip/rv1126/Kconfig @@ -47,7 +47,7 @@ config TPL_LDSCRIPT default "arch/arm/mach-rockchip/u-boot-tpl.lds" config TPL_STACK - default 0xff718000 + default 0xff718000 config TPL_SYS_MALLOC_F_LEN default 0x2000 diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index fb98b647442..a9b639a5ed9 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -15,8 +15,8 @@ config SOCFPGA_SECURE_VAB_AUTH select SHA512 select SPL_FIT_IMAGE_POST_PROCESS help - All images loaded from FIT will be authenticated by Secure Device - Manager. + All images loaded from FIT will be authenticated by Secure Device + Manager. config SOCFPGA_SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE bool "Allow non-FIT VAB signed images" diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig index d9e264024c8..df26e7b8ef2 100644 --- a/arch/arm/mach-sti/Kconfig +++ b/arch/arm/mach-sti/Kconfig @@ -14,7 +14,7 @@ config TARGET_STIH410_B2260 Specifications. Features: - 1GB DDR - On-Board USB combo WiFi/Bluetooth RTL8723BU - with PCB soldered antenna + with PCB soldered antenna - Ethernet 1000-BaseT - Sata - HDMI diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 39f25869c1d..f45010ddbd0 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -56,8 +56,8 @@ config STM32MP13X imply CMD_NVEDIT_INFO imply OF_UPSTREAM help - support of STMicroelectronics SOC STM32MP13x family - STMicroelectronics MPU with core ARMv7 + support of STMicroelectronics SOC STM32MP13x family + STMicroelectronics MPU with core ARMv7 config STM32MP15X bool "Support STMicroelectronics STM32MP15x Soc" @@ -77,10 +77,10 @@ config STM32MP15X imply CMD_NVEDIT_INFO imply OF_UPSTREAM help - support of STMicroelectronics SOC STM32MP15x family - STM32MP157, STM32MP153 or STM32MP151 - STMicroelectronics MPU with core ARMv7 - dual core A7 for STM32MP157/3, monocore for STM32MP151 + support of STMicroelectronics SOC STM32MP15x family + STM32MP157, STM32MP153 or STM32MP151 + STMicroelectronics MPU with core ARMv7 + dual core A7 for STM32MP157/3, monocore for STM32MP151 config STM32MP21X bool "Support STMicroelectronics STM32MP21x Soc" @@ -104,8 +104,8 @@ config STM32MP21X imply TEE imply VERSION_VARIABLE help - Support of STMicroelectronics SOC STM32MP21X family - STMicroelectronics MPU with 1 A35 core and 1 M33 core + Support of STMicroelectronics SOC STM32MP21X family + STMicroelectronics MPU with 1 A35 core and 1 M33 core config STM32MP23X bool "Support STMicroelectronics STM32MP23x Soc" @@ -129,8 +129,8 @@ config STM32MP23X imply TEE imply VERSION_VARIABLE help - Support of STMicroelectronics SOC STM32MP23x family - STMicroelectronics MPU with 2 * A53 core and 1 M33 core + Support of STMicroelectronics SOC STM32MP23x family + STMicroelectronics MPU with 2 * A53 core and 1 M33 core config STM32MP25X bool "Support STMicroelectronics STM32MP25x Soc" @@ -153,8 +153,8 @@ config STM32MP25X imply TEE imply VERSION_VARIABLE help - Support of STMicroelectronics SOC STM32MP25x family - STMicroelectronics MPU with 2 * A53 core and 1 M33 core + Support of STMicroelectronics SOC STM32MP25x family + STMicroelectronics MPU with 2 * A53 core and 1 M33 core endchoice config NR_DRAM_BANKS @@ -164,13 +164,13 @@ config DDR_CACHEABLE_SIZE hex "Size of the DDR marked cacheable in pre-reloc stage" default 0x40000000 help - Define the size of the DDR marked as cacheable in U-Boot - pre-reloc stage. - This option can be useful to avoid speculatif access - to secured area of DDR used by TF-A or OP-TEE before U-Boot - initialization. - The areas marked "no-map" in device tree should be located - before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE. + Define the size of the DDR marked as cacheable in U-Boot + pre-reloc stage. + This option can be useful to avoid speculatif access + to secured area of DDR used by TF-A or OP-TEE before U-Boot + initialization. + The areas marked "no-map" in device tree should be located + before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE. config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 hex "Partition on MMC2 to use to load U-Boot from" @@ -203,10 +203,10 @@ config CMD_STM32KEY bool "command stm32key to fuse public key hash" depends on CMDLINE help - fuse public key hash in corresponding fuse used to authenticate - binary. - This command is used to evaluate the secure boot on stm32mp SOC, - it is deactivated by default in real products. + fuse public key hash in corresponding fuse used to authenticate + binary. + This command is used to evaluate the secure boot on stm32mp SOC, + it is deactivated by default in real products. config MFD_STM32_TIMERS bool "STM32 multifonction timer support" @@ -226,15 +226,15 @@ config STM32MP15_PWR depends on DM_REGULATOR && DM_PMIC && (STM32MP13X || STM32MP15X) default y if STM32MP15X help - This config enables implementation of driver-model pmic and - regulator uclass features for access to STM32MP15x PWR. + This config enables implementation of driver-model pmic and + regulator uclass features for access to STM32MP15x PWR. config SPL_STM32MP15_PWR bool "Enable driver for STM32MP15x PWR in SPL" depends on SPL && SPL_DM_REGULATOR && SPL_DM_PMIC && (STM32MP13X || STM32MP15X) default y if STM32MP15X help - This config enables implementation of driver-model pmic and - regulator uclass features for access to STM32MP15x PWR in SPL. + This config enables implementation of driver-model pmic and + regulator uclass features for access to STM32MP15x PWR in SPL. endif diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig index 647e0a4c2bf..5ae57d13340 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig @@ -10,10 +10,10 @@ config CMD_STM32PROG imply DFU_MMC if MMC imply DFU_MTD if MTD help - activate a specific command stm32prog for STM32MP soc family - witch update the device with the tools STM32CubeProgrammer - NB: access to not volatile memory (NOR/NAND/SD/eMMC) is based - on U-Boot DFU framework + activate a specific command stm32prog for STM32MP soc family + witch update the device with the tools STM32CubeProgrammer + NB: access to not volatile memory (NOR/NAND/SD/eMMC) is based + on U-Boot DFU framework config CMD_STM32PROG_USB bool "support stm32prog over USB" @@ -21,9 +21,9 @@ config CMD_STM32PROG_USB depends on USB_GADGET_DOWNLOAD default y help - activate the command "stm32prog usb" for STM32MP soc family - witch update the device with the tools STM32CubeProgrammer, - using USB with DFU protocol + activate the command "stm32prog usb" for STM32MP soc family + witch update the device with the tools STM32CubeProgrammer, + using USB with DFU protocol config CMD_STM32PROG_SERIAL bool "support stm32prog over UART" @@ -32,13 +32,13 @@ config CMD_STM32PROG_SERIAL imply SILENT_CONSOLE default y help - activate the command "stm32prog serial" for STM32MP soc family - with the tools STM32CubeProgrammer using U-Boot serial device - and UART protocol. + activate the command "stm32prog serial" for STM32MP soc family + with the tools STM32CubeProgrammer using U-Boot serial device + and UART protocol. config CMD_STM32PROG_OTP bool "support stm32prog for OTP update" depends on CMD_STM32PROG default y if ARM_SMCCC || OPTEE help - Support the OTP update with the command "stm32prog" for STM32MP + Support the OTP update with the command "stm32prog" for STM32MP diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index ceba96b61a5..5ace74567dd 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -223,11 +223,11 @@ config SUNXI_SRAM_ADDRESS default 0x44000 if MACH_SUN55I_A523 default 0x20000 if SUN50I_GEN_H6 || SUNXI_GEN_NCAT2 default 0x0 - ---help--- - Older Allwinner SoCs have their mask boot ROM mapped just below 4GB, - with the first SRAM region being located at address 0. - Some newer SoCs map the boot ROM at address 0 instead and move the - SRAM to a different address. + help + Older Allwinner SoCs have their mask boot ROM mapped just below 4GB, + with the first SRAM region being located at address 0. + Some newer SoCs map the boot ROM at address 0 instead and move the + SRAM to a different address. config SUNXI_RVBAR_ADDRESS hex @@ -236,26 +236,26 @@ config SUNXI_RVBAR_ADDRESS default 0x08000040 if MACH_SUN55I_A523 default 0x09010040 if SUN50I_GEN_H6 default 0x017000a0 - ---help--- - The read-only RVBAR system register holds the address of the first - instruction to execute after a reset. Allwinner cores provide a - writable MMIO backing store for this register, to allow to set the - entry point when switching to AArch64. This store is on different - addresses, depending on the SoC. + help + The read-only RVBAR system register holds the address of the first + instruction to execute after a reset. Allwinner cores provide a + writable MMIO backing store for this register, to allow to set the + entry point when switching to AArch64. This store is on different + addresses, depending on the SoC. config SUNXI_RVBAR_ALTERNATIVE hex depends on ARM64 default 0x08100040 if MACH_SUN50I_H616 default SUNXI_RVBAR_ADDRESS - ---help--- - The H616 die exists in at least two variants, with one having the - RVBAR registers at a different address. If the SoC variant ID - (stored in SRAM_VER_REG[7:0]) is not 0, we need to use the - other address. - Set this alternative address to the same as the normal address - for all other SoCs, so the content of the SRAM_VER_REG becomes - irrelevant there, and we can use the same code. + help + The H616 die exists in at least two variants, with one having the + RVBAR registers at a different address. If the SoC variant ID + (stored in SRAM_VER_REG[7:0]) is not 0, we need to use the + other address. + Set this alternative address to the same as the normal address + for all other SoCs, so the content of the SRAM_VER_REG becomes + irrelevant there, and we can use the same code. config SUNXI_BL31_BASE hex @@ -282,16 +282,16 @@ config SUNXI_A64_TIMER_ERRATUM # not supported by Kconfig config SUNXI_GEN_SUN4I bool - ---help--- - Select this for sunxi SoCs which have resets and clocks set up - as the original A10 (mach-sun4i). + help + Select this for sunxi SoCs which have resets and clocks set up + as the original A10 (mach-sun4i). config SUNXI_GEN_SUN6I bool - ---help--- - Select this for sunxi SoCs which have sun6i like periphery, like - separate ahb reset control registers, custom pmic bus, new style - watchdog, etc. + help + Select this for sunxi SoCs which have sun6i like periphery, like + separate ahb reset control registers, custom pmic bus, new style + watchdog, etc. config SUN50I_GEN_H6 bool @@ -299,38 +299,38 @@ config SUN50I_GEN_H6 select SPL_LOAD_FIT if SPL select MMC_SUNXI_HAS_NEW_MODE select SUPPORT_SPL - ---help--- - Select this for sunxi SoCs which have H6 like peripherals, clocks - and memory map. + help + Select this for sunxi SoCs which have H6 like peripherals, clocks + and memory map. config SUNXI_GEN_NCAT2 bool select MMC_SUNXI_HAS_NEW_MODE select SUPPORT_SPL - ---help--- - Select this for sunxi SoCs which have D1 like peripherals, clocks - and memory map. + help + Select this for sunxi SoCs which have D1 like peripherals, clocks + and memory map. config SUNXI_DRAM_DW bool - ---help--- - Select this for sunxi SoCs which uses a DRAM controller like the - DesignWare controller used in H3, mainly SoCs after H3, which do - not have official open-source DRAM initialization code, but can - use modified H3 DRAM initialization code. + help + Select this for sunxi SoCs which uses a DRAM controller like the + DesignWare controller used in H3, mainly SoCs after H3, which do + not have official open-source DRAM initialization code, but can + use modified H3 DRAM initialization code. if SUNXI_DRAM_DW config SUNXI_DRAM_DW_16BIT bool - ---help--- - Select this for sunxi SoCs with DesignWare DRAM controller and - have only 16-bit memory buswidth. + help + Select this for sunxi SoCs with DesignWare DRAM controller and + have only 16-bit memory buswidth. config SUNXI_DRAM_DW_32BIT bool - ---help--- - Select this for sunxi SoCs with DesignWare DRAM controller with - 32-bit memory buswidth. + help + Select this for sunxi SoCs with DesignWare DRAM controller with + 32-bit memory buswidth. endif config MACH_SUNXI_H3_H5 @@ -576,25 +576,25 @@ config MACH_SUN8I config RESERVE_ALLWINNER_BOOT0_HEADER bool "reserve space for Allwinner boot0 header" select ENABLE_ARM_SOC_BOOT0_HOOK - ---help--- - Prepend a 1536 byte (empty) header to the U-Boot image file, to be - filled with magic values post build. The Allwinner provided boot0 - blob relies on this information to load and execute U-Boot. - Only needed on 64-bit Allwinner boards so far when using boot0. + help + Prepend a 1536 byte (empty) header to the U-Boot image file, to be + filled with magic values post build. The Allwinner provided boot0 + blob relies on this information to load and execute U-Boot. + Only needed on 64-bit Allwinner boards so far when using boot0. config ARM_BOOT_HOOK_RMR bool depends on ARM64 default y select ENABLE_ARM_SOC_BOOT0_HOOK - ---help--- - Insert some ARM32 code at the very beginning of the U-Boot binary - which uses an RMR register write to bring the core into AArch64 mode. - The very first instruction acts as a switch, since it's carefully - chosen to be a NOP in one mode and a branch in the other, so the - code would only be executed if not already in AArch64. - This allows both the SPL and the U-Boot proper to be entered in - either mode and switch to AArch64 if needed. + help + Insert some ARM32 code at the very beginning of the U-Boot binary + which uses an RMR register write to bring the core into AArch64 mode. + The very first instruction acts as a switch, since it's carefully + chosen to be a NOP in one mode and a branch in the other, so the + code would only be executed if not already in AArch64. + This allows both the SPL and the U-Boot proper to be entered in + either mode and switch to AArch64 if needed. if SUNXI_DRAM_DW || DRAM_SUN50I_H6 || DRAM_SUN50I_H616 || DRAM_SUN50I_A133 || DRAM_SUN55I_A523 config SUNXI_DRAM_DDR3 @@ -622,33 +622,33 @@ config SUNXI_DRAM_DDR3_1333 bool "DDR3 1333" select SUNXI_DRAM_DDR3 depends on !DRAM_SUN50I_A133 - ---help--- - This option is the original only supported memory type, which suits - many H3/H5/A64 boards available now. + help + This option is the original only supported memory type, which suits + many H3/H5/A64 boards available now. config SUNXI_DRAM_LPDDR3_STOCK bool "LPDDR3 with Allwinner stock configuration" select SUNXI_DRAM_LPDDR3 depends on !DRAM_SUN50I_A133 - ---help--- - This option is the LPDDR3 timing used by the stock boot0 by - Allwinner. + help + This option is the LPDDR3 timing used by the stock boot0 by + Allwinner. config SUNXI_DRAM_H6_LPDDR3 bool "LPDDR3 DRAM chips on the H6 DRAM controller" select SUNXI_DRAM_LPDDR3 depends on DRAM_SUN50I_H6 - ---help--- - This option is the LPDDR3 timing used by the stock boot0 by - Allwinner. + help + This option is the LPDDR3 timing used by the stock boot0 by + Allwinner. config SUNXI_DRAM_H6_DDR3_1333 bool "DDR3-1333 boot0 timings on the H6 DRAM controller" select SUNXI_DRAM_DDR3 depends on DRAM_SUN50I_H6 - ---help--- - This option is the DDR3 timing used by the boot0 on H6 TV boxes - which use a DDR3-1333 timing. + help + This option is the DDR3 timing used by the boot0 on H6 TV boxes + which use a DDR3-1333 timing. config SUNXI_DRAM_H616_LPDDR3 bool "LPDDR3 DRAM chips on the H616 DRAM controller" @@ -694,9 +694,9 @@ config SUNXI_DRAM_DDR2_V3S bool "DDR2 found in V3s chip" select SUNXI_DRAM_DDR2 depends on MACH_SUN8I_V3S - ---help--- - This option is only for the DDR2 memory chip which is co-packaged in - Allwinner V3s SoC. + help + This option is only for the DDR2 memory chip which is co-packaged in + Allwinner V3s SoC. config SUNXI_DRAM_A523_DDR3 bool "DDR3 DRAM chips on the A523/T527 DRAM controller" @@ -720,8 +720,8 @@ config DRAM_TYPE int "sunxi dram type" depends on MACH_SUN8I_A83T default 3 - ---help--- - Set the dram type, 3: DDR3, 7: LPDDR3 + help + Set the dram type, 3: DDR3, 7: LPDDR3 config DRAM_CLK int "sunxi dram clock speed" @@ -734,17 +734,17 @@ config DRAM_CLK default 744 if MACH_SUN50I_H6 default 720 if MACH_SUN50I_H616 || MACH_SUN50I_A133 default 1200 if MACH_SUN55I_A523 - ---help--- - Set the dram clock speed, valid range 240 - 480 (prior to sun9i), - must be a multiple of 24. For the sun9i (A80), the tested values - (for DDR3-1600) are 312 to 792. + help + Set the dram clock speed, valid range 240 - 480 (prior to sun9i), + must be a multiple of 24. For the sun9i (A80), the tested values + (for DDR3-1600) are 312 to 792. if MACH_SUN5I || MACH_SUN7I config DRAM_MBUS_CLK int "sunxi mbus clock speed" default 300 - ---help--- - Set the mbus clock speed. The maximum on sun5i hardware is 300MHz. + help + Set the mbus clock speed. The maximum on sun5i hardware is 300MHz. endif @@ -760,8 +760,8 @@ config DRAM_ZQ default 3881979 if MACH_SUNXI_H3_H5 || MACH_SUN8I_R40 || MACH_SUN50I_H6 default 4145117 if MACH_SUN9I default 3881915 if MACH_SUN50I - ---help--- - Set the dram zq value. + help + Set the dram zq value. config DRAM_ODT_EN bool "sunxi dram odt enable" @@ -772,72 +772,72 @@ config DRAM_ODT_EN default y if MACH_SUN8I_R40 default y if MACH_SUN50I default y if MACH_SUN50I_H6 - ---help--- - Select this to enable dram odt (on die termination). + help + Select this to enable dram odt (on die termination). if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I config DRAM_EMR1 int "sunxi dram emr1 value" default 0 if MACH_SUN4I default 4 if MACH_SUN5I || MACH_SUN7I - ---help--- - Set the dram controller emr1 value. + help + Set the dram controller emr1 value. config DRAM_TPR3 hex "sunxi dram tpr3 value" default 0x0 - ---help--- - Set the dram controller tpr3 parameter. This parameter configures - the delay on the command lane and also phase shifts, which are - applied for sampling incoming read data. The default value 0 - means that no phase/delay adjustments are necessary. Properly - configuring this parameter increases reliability at high DRAM - clock speeds. + help + Set the dram controller tpr3 parameter. This parameter configures + the delay on the command lane and also phase shifts, which are + applied for sampling incoming read data. The default value 0 + means that no phase/delay adjustments are necessary. Properly + configuring this parameter increases reliability at high DRAM + clock speeds. config DRAM_DQS_GATING_DELAY hex "sunxi dram dqs_gating_delay value" default 0x0 - ---help--- - Set the dram controller dqs_gating_delay parmeter. Each byte - encodes the DQS gating delay for each byte lane. The delay - granularity is 1/4 cycle. For example, the value 0x05060606 - means that the delay is 5 quarter-cycles for one lane (1.25 - cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes. - The default value 0 means autodetection. The results of hardware - autodetection are not very reliable and depend on the chip - temperature (sometimes producing different results on cold start - and warm reboot). But the accuracy of hardware autodetection - is usually good enough, unless running at really high DRAM - clocks speeds (up to 600MHz). If unsure, keep as 0. + help + Set the dram controller dqs_gating_delay parmeter. Each byte + encodes the DQS gating delay for each byte lane. The delay + granularity is 1/4 cycle. For example, the value 0x05060606 + means that the delay is 5 quarter-cycles for one lane (1.25 + cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes. + The default value 0 means autodetection. The results of hardware + autodetection are not very reliable and depend on the chip + temperature (sometimes producing different results on cold start + and warm reboot). But the accuracy of hardware autodetection + is usually good enough, unless running at really high DRAM + clocks speeds (up to 600MHz). If unsure, keep as 0. choice prompt "sunxi dram timings" default DRAM_TIMINGS_VENDOR_MAGIC - ---help--- - Select the timings of the DDR3 chips. + help + Select the timings of the DDR3 chips. config DRAM_TIMINGS_VENDOR_MAGIC bool "Magic vendor timings from Android" - ---help--- - The same DRAM timings as in the Allwinner boot0 bootloader. + help + The same DRAM timings as in the Allwinner boot0 bootloader. config DRAM_TIMINGS_DDR3_1066F_1333H bool "JEDEC DDR3-1333H with down binning to DDR3-1066F" - ---help--- - Use the timings of the standard JEDEC DDR3-1066F speed bin for - DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin - for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips - used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333 - or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm - that down binning to DDR3-1066F is supported (because DDR3-1066F - uses a bit faster timings than DDR3-1333H). + help + Use the timings of the standard JEDEC DDR3-1066F speed bin for + DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin + for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips + used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333 + or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm + that down binning to DDR3-1066F is supported (because DDR3-1066F + uses a bit faster timings than DDR3-1333H). config DRAM_TIMINGS_DDR3_800E_1066G_1333J bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J" - ---help--- - Use the timings of the slowest possible JEDEC speed bin for the - selected DRAM_CLK. Depending on the DRAM_CLK value, it may be - DDR3-800E, DDR3-1066G or DDR3-1333J. + help + Use the timings of the slowest possible JEDEC speed bin for the + selected DRAM_CLK. Depending on the DRAM_CLK value, it may be + DDR3-800E, DDR3-1066G or DDR3-1333J. endchoice @@ -847,11 +847,11 @@ if MACH_SUN8I_A23 config DRAM_ODT_CORRECTION int "sunxi dram odt correction value" default 0 - ---help--- - Set the dram odt correction value (range -255 - 255). In allwinner - fex files, this option is found in bits 8-15 of the u32 odt_en variable - in the [dram] section. When bit 31 of the odt_en variable is set - then the correction is negative. Usually the value for this is 0. + help + Set the dram odt correction value (range -255 - 255). In allwinner + fex files, this option is found in bits 8-15 of the u32 odt_en variable + in the [dram] section. When bit 31 of the odt_en variable is set + then the correction is negative. Usually the value for this is 0. endif config SYS_CLK_FREQ @@ -888,59 +888,59 @@ config SUNXI_MINIMUM_DRAM_MB default 32 if MACH_SUNIV default 64 if MACH_SUN8I_V3S default 256 - ---help--- - Minimum DRAM size expected on the board. Traditionally we assumed - 256 MB, so that U-Boot would load at 160MB. With co-packaged DRAM - we have smaller sizes, though, so that U-Boot's own load address and - the default payload addresses must be shifted down. - This is expected to be fixed by the SoC selection. + help + Minimum DRAM size expected on the board. Traditionally we assumed + 256 MB, so that U-Boot would load at 160MB. With co-packaged DRAM + we have smaller sizes, though, so that U-Boot's own load address and + the default payload addresses must be shifted down. + This is expected to be fixed by the SoC selection. config UART0_PORT_F bool "UART0 on MicroSD breakout board" - ---help--- - Repurpose the SD card slot for getting access to the UART0 serial - console. Primarily useful only for low level u-boot debugging on - tablets, where normal UART0 is difficult to access and requires - device disassembly and/or soldering. As the SD card can't be used - at the same time, the system can be only booted in the FEL mode. - Only enable this if you really know what you are doing. + help + Repurpose the SD card slot for getting access to the UART0 serial + console. Primarily useful only for low level u-boot debugging on + tablets, where normal UART0 is difficult to access and requires + device disassembly and/or soldering. As the SD card can't be used + at the same time, the system can be only booted in the FEL mode. + Only enable this if you really know what you are doing. config OLD_SUNXI_KERNEL_COMPAT bool "Enable workarounds for booting old kernels" - ---help--- - Set this to enable various workarounds for old kernels, this results in - sub-optimal settings for newer kernels, only enable if needed. + help + Set this to enable various workarounds for old kernels, this results in + sub-optimal settings for newer kernels, only enable if needed. config MMC1_PINS_PH bool "Pins for mmc1 are on Port H" depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40 - ---help--- - Select this option for boards where mmc1 uses the Port H pinmux. + help + Select this option for boards where mmc1 uses the Port H pinmux. config MMC_SUNXI_SLOT_EXTRA int "mmc extra slot number" default -1 - ---help--- - sunxi builds always enable mmc0, some boards also have a second sdcard - slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable - support for this. + help + sunxi builds always enable mmc0, some boards also have a second sdcard + slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable + support for this. config I2C0_ENABLE bool "Enable I2C/TWI controller 0" default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_R40 default n if MACH_SUN6I || MACH_SUN8I select CMD_I2C - ---help--- - This allows enabling I2C/TWI controller 0 by muxing its pins, enabling - its clock and setting up the bus. This is especially useful on devices - with slaves connected to the bus or with pins exposed through e.g. an - expansion port/header. + help + This allows enabling I2C/TWI controller 0 by muxing its pins, enabling + its clock and setting up the bus. This is especially useful on devices + with slaves connected to the bus or with pins exposed through e.g. an + expansion port/header. config I2C1_ENABLE bool "Enable I2C/TWI controller 1" select CMD_I2C - ---help--- - See I2C0_ENABLE help text. + help + See I2C0_ENABLE help text. if SUNXI_GEN_SUN6I || SUN50I_GEN_H6 || SUNXI_GEN_NCAT2 config R_I2C_ENABLE @@ -948,20 +948,20 @@ config R_I2C_ENABLE # This is used for the pmic on H3 default y if SY8106A_POWER select CMD_I2C - ---help--- - Set this to y to enable the I2C controller which is part of the PRCM. + help + Set this to y to enable the I2C controller which is part of the PRCM. endif config AXP_GPIO bool "Enable support for gpio-s on axp PMICs" depends on AXP_PMIC_BUS - ---help--- - Say Y here to enable support for the gpio pins of the axp PMIC ICs. + help + Say Y here to enable support for the gpio pins of the axp PMIC ICs. config AXP_DISABLE_BOOT_ON_POWERON bool "Disable device boot on power plug-in" depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER - ---help--- + help Say Y here to prevent the device from booting up because of a plug-in event. When set, the device will boot into the SPL briefly to determine why it was powered on, and if it was determined because of @@ -982,127 +982,127 @@ config VIDEO_SUNXI imply VIDEO_DAMAGE imply VIDEO_DT_SIMPLEFB default y - ---help--- - Say Y here to add support for using a graphical console on the HDMI, - LCD or VGA output found on older sunxi devices. This will also provide - a simple_framebuffer device for Linux. + help + Say Y here to add support for using a graphical console on the HDMI, + LCD or VGA output found on older sunxi devices. This will also provide + a simple_framebuffer device for Linux. config VIDEO_HDMI bool "HDMI output support" depends on VIDEO_SUNXI && !MACH_SUN8I && !MACH_SUNIV default y - ---help--- - Say Y here to add support for outputting video over HDMI. + help + Say Y here to add support for outputting video over HDMI. config VIDEO_VGA bool "VGA output support" depends on VIDEO_SUNXI && (MACH_SUN4I || MACH_SUN7I) - ---help--- - Say Y here to add support for outputting video over VGA. + help + Say Y here to add support for outputting video over VGA. config VIDEO_VGA_VIA_LCD bool "VGA via LCD controller support" depends on VIDEO_SUNXI && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I) - ---help--- - Say Y here to add support for external DACs connected to the parallel - LCD interface driving a VGA connector, such as found on the - Olimex A13 boards. + help + Say Y here to add support for external DACs connected to the parallel + LCD interface driving a VGA connector, such as found on the + Olimex A13 boards. config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH bool "Force sync active high for VGA via LCD controller support" depends on VIDEO_VGA_VIA_LCD - ---help--- - Say Y here if you've a board which uses opendrain drivers for the vga - hsync and vsync signals. Opendrain drivers cannot generate steep enough - positive edges for a stable video output, so on boards with opendrain - drivers the sync signals must always be active high. + help + Say Y here if you've a board which uses opendrain drivers for the vga + hsync and vsync signals. Opendrain drivers cannot generate steep enough + positive edges for a stable video output, so on boards with opendrain + drivers the sync signals must always be active high. config VIDEO_VGA_EXTERNAL_DAC_EN string "LCD panel power enable pin" depends on VIDEO_VGA_VIA_LCD default "" - ---help--- - Set the enable pin for the external VGA DAC. This takes a string in the - format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + help + Set the enable pin for the external VGA DAC. This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. config VIDEO_COMPOSITE bool "Composite video output support" depends on VIDEO_SUNXI && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) - ---help--- - Say Y here to add support for outputting composite video. + help + Say Y here to add support for outputting composite video. config VIDEO_LCD_MODE string "LCD panel timing details" depends on VIDEO_SUNXI default "" - ---help--- - LCD panel timing details string, leave empty if there is no LCD panel. - This is in drivers/video/videomodes.c: video_get_params() format, e.g. - x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 - Also see: http://linux-sunxi.org/LCD + help + LCD panel timing details string, leave empty if there is no LCD panel. + This is in drivers/video/videomodes.c: video_get_params() format, e.g. + x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0 + Also see: http://linux-sunxi.org/LCD config VIDEO_LCD_DCLK_PHASE int "LCD panel display clock phase" depends on VIDEO_SUNXI || VIDEO default 1 range 0 3 - ---help--- - Select LCD panel display clock phase shift + help + Select LCD panel display clock phase shift config VIDEO_LCD_POWER string "LCD panel power enable pin" depends on VIDEO_SUNXI default "" - ---help--- - Set the power enable pin for the LCD panel. This takes a string in the - format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + help + Set the power enable pin for the LCD panel. This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. config VIDEO_LCD_RESET string "LCD panel reset pin" depends on VIDEO_SUNXI default "" - ---help--- - Set the reset pin for the LCD panel. This takes a string in the format - understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + help + Set the reset pin for the LCD panel. This takes a string in the format + understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. config VIDEO_LCD_BL_EN string "LCD panel backlight enable pin" depends on VIDEO_SUNXI default "" - ---help--- - Set the backlight enable pin for the LCD panel. This takes a string in the - the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of - port H. + help + Set the backlight enable pin for the LCD panel. This takes a string in the + the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of + port H. config VIDEO_LCD_BL_PWM string "LCD panel backlight pwm pin" depends on VIDEO_SUNXI default "" - ---help--- - Set the backlight pwm pin for the LCD panel. This takes a string in the - format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. + help + Set the backlight pwm pin for the LCD panel. This takes a string in the + format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. config VIDEO_LCD_BL_PWM_ACTIVE_LOW bool "LCD panel backlight pwm is inverted" depends on VIDEO_SUNXI default y - ---help--- - Set this if the backlight pwm output is active low. + help + Set this if the backlight pwm output is active low. config VIDEO_LCD_PANEL_I2C bool "LCD panel needs to be configured via i2c" depends on VIDEO_SUNXI select DM_I2C_GPIO - ---help--- - Say y here if the LCD panel needs to be configured via i2c. This - will add a bitbang i2c controller using gpios to talk to the LCD. + help + Say y here if the LCD panel needs to be configured via i2c. This + will add a bitbang i2c controller using gpios to talk to the LCD. config VIDEO_LCD_PANEL_I2C_NAME string "LCD panel i2c interface node name" depends on VIDEO_LCD_PANEL_I2C default "i2c" - ---help--- - Set the device tree node name for the LCD i2c interface. + help + Set the device tree node name for the LCD i2c interface. # Note only one of these may be selected at a time! But hidden choices are # not supported by Kconfig @@ -1123,16 +1123,16 @@ config VIDEO_DE2 select VIDEO_DW_HDMI imply VIDEO_DT_SIMPLEFB default y - ---help--- - Say y here if you want to build DE2 video driver which is present on - newer SoCs. Currently only HDMI output is supported. + help + Say y here if you want to build DE2 video driver which is present on + newer SoCs. Currently only HDMI output is supported. choice prompt "LCD panel support" depends on VIDEO_SUNXI - ---help--- - Select which type of LCD panel to support. + help + Select which type of LCD panel to support. config VIDEO_LCD_PANEL_PARALLEL bool "Generic parallel interface LCD panel" @@ -1146,40 +1146,40 @@ config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip" select VIDEO_LCD_SSD2828 select VIDEO_LCD_IF_PARALLEL - ---help--- - 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0 + help + 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0 config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804 bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip" select VIDEO_LCD_ANX9804 select VIDEO_LCD_IF_PARALLEL select VIDEO_LCD_PANEL_I2C - ---help--- - Select this for eDP LCD panels with 4 lanes running at 1.62G, - connected via an ANX9804 bridge chip. + help + Select this for eDP LCD panels with 4 lanes running at 1.62G, + connected via an ANX9804 bridge chip. config VIDEO_LCD_PANEL_HITACHI_TX18D42VM bool "Hitachi tx18d42vm LCD panel" select VIDEO_LCD_HITACHI_TX18D42VM select VIDEO_LCD_IF_LVDS - ---help--- - 7.85" 1024x768 Hitachi tx18d42vm LCD panel support + help + 7.85" 1024x768 Hitachi tx18d42vm LCD panel support config VIDEO_LCD_TL059WV5C0 bool "tl059wv5c0 LCD panel" select VIDEO_LCD_PANEL_I2C select VIDEO_LCD_IF_PARALLEL - ---help--- - 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and - Aigo M60/M608/M606 tablets. + help + 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and + Aigo M60/M608/M606 tablets. endchoice config GMAC_TX_DELAY int "GMAC Transmit Clock Delay Chain" default 0 - ---help--- - Set the GMAC Transmit Clock Delay Chain value. + help + Set the GMAC Transmit Clock Delay Chain value. config SPL_STACK_R_ADDR default 0x81e00000 if MACH_SUNIV diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index c570fb3294d..d2fa72f4724 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -4,7 +4,7 @@ config SYS_CONFIG_NAME default "uniphier" choice - prompt "UniPhier SoC select" + prompt "UniPhier SoC select" config ARCH_UNIPHIER_V7_MULTI bool "UniPhier V7 SoCs" diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 8bebf0ea3e1..61a1845c2ee 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -11,56 +11,56 @@ config STATIC_RELA config MCF520x select OF_CONTROL select DM - select DM_SERIAL + select DM_SERIAL select ARCH_COLDFIRE bool config MCF52x2 select OF_CONTROL select DM - select DM_SERIAL + select DM_SERIAL select ARCH_COLDFIRE bool config MCF523x select OF_CONTROL select DM - select DM_SERIAL + select DM_SERIAL select ARCH_COLDFIRE bool config MCF530x select OF_CONTROL select DM - select DM_SERIAL + select DM_SERIAL select ARCH_COLDFIRE bool config MCF5301x select OF_CONTROL select DM - select DM_SERIAL + select DM_SERIAL select ARCH_COLDFIRE bool config MCF532x select OF_CONTROL select DM - select DM_SERIAL + select DM_SERIAL select ARCH_COLDFIRE bool config MCF537x select OF_CONTROL select DM - select DM_SERIAL + select DM_SERIAL select ARCH_COLDFIRE bool config MCF5441x select OF_CONTROL select DM - select DM_SERIAL + select DM_SERIAL select ARCH_COLDFIRE select CREATE_ARCH_SYMLINK bool @@ -191,9 +191,9 @@ config TARGET_AMCORE select M5307 config TARGET_STMARK2 - bool "Support stmark2" - select CF_DSPI - select M54418 + bool "Support stmark2" + select CF_DSPI + select M54418 config TARGET_QEMU_M68K bool "Support QEMU m68k virt" diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 36612756294..75913d4f1ae 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -267,8 +267,8 @@ config CPU_MIPS64_OCTEON select 64BIT select SPL_64BIT if SPL help - Choose this option for Marvell Octeon CPUs. These CPUs are between - MIPS64 R5 and R6 with other extensions. + Choose this option for Marvell Octeon CPUs. These CPUs are between + MIPS64 R5 and R6 with other extensions. endchoice @@ -351,7 +351,7 @@ config MIPS_RELOCATION_TABLE_SIZE range 0x100 0x10000 default "0xc000" if TARGET_MALTA default "0x8000" - ---help--- + help A table of relocation data will be appended to the U-Boot binary and parsed in relocate_code() to fix up all offsets in the relocated U-Boot. @@ -526,7 +526,7 @@ config MIPS_SRAM_INIT config DMA_ADDR_T_64BIT bool help - Select this to enable 64-bit DMA addressing + Select this to enable 64-bit DMA addressing config SYS_DCACHE_SIZE int diff --git a/arch/mips/mach-octeon/Kconfig b/arch/mips/mach-octeon/Kconfig index 6105cdcf96e..cd1e377c79d 100644 --- a/arch/mips/mach-octeon/Kconfig +++ b/arch/mips/mach-octeon/Kconfig @@ -25,8 +25,8 @@ choice config SOC_OCTEON3 bool "Octeon III family" help - This selects the Octeon III SoC family CN70xx, CN73XX, CN78xx - and CNF75XX. + This selects the Octeon III SoC family CN70xx, CN73XX, CN78xx + and CNF75XX. endchoice @@ -38,14 +38,14 @@ config TARGET_OCTEON_EBB7304 bool "Marvell Octeon EBB7304" select OCTEON_CN73XX help - Choose this for the Octeon EBB7304 board + Choose this for the Octeon EBB7304 board config TARGET_OCTEON_NIC23 bool "Marvell Octeon NIC23" select ARCH_MISC_INIT select OCTEON_CN73XX help - Choose this for the Octeon NIC23 board + Choose this for the Octeon NIC23 board endchoice diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index cb564b32c07..32a140b0913 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -966,14 +966,14 @@ config E500 bool default y help - Enable PowerPC E500 cores, including e500v1, e500v2, e500mc + Enable PowerPC E500 cores, including e500v1, e500v2, e500mc config E500MC bool select BTB imply CMD_PCI help - Enble PowerPC E500MC core + Enable PowerPC E500MC core config E5500 bool @@ -982,7 +982,7 @@ config E6500 bool select BTB help - Enable PowerPC E6500 core + Enable PowerPC E6500 core config NOBQFMAN bool @@ -990,7 +990,7 @@ config NOBQFMAN config FSL_LAW bool help - Use Freescale common code for Local Access Window + Use Freescale common code for Local Access Window config HETROGENOUS_CLUSTERS bool @@ -1054,10 +1054,10 @@ config SYS_CCSRBAR_DEFAULT ARCH_T4240 default 0xe0000000 if ARCH_QEMU_E500 help - Default value of CCSRBAR comes from power-on-reset. It - is fixed on each SoC. Some SoCs can have different value - if changed by pre-boot regime. The value here must match - the current value in SoC. If not sure, do not change. + Default value of CCSRBAR comes from power-on-reset. It + is fixed on each SoC. Some SoCs can have different value + if changed by pre-boot regime. The value here must match + the current value in SoC. If not sure, do not change. config SYS_DPAA_PME bool @@ -1287,8 +1287,8 @@ config SYS_FSL_NUM_LAWS default 8 if ARCH_MPC8540 || \ ARCH_MPC8560 help - Number of local access windows. This is fixed per SoC. - If not sure, do not change. + Number of local access windows. This is fixed per SoC. + If not sure, do not change. config SYS_FSL_CORES_PER_CLUSTER int @@ -1308,8 +1308,8 @@ config SYS_NUM_TLBCAMS default 64 if E500MC default 16 help - Number of TLB CAM entries for Book-E chips. 64 for E500MC, - 16 for other E500 SoCs. + Number of TLB CAM entries for Book-E chips. 64 for E500MC, + 16 for other E500 SoCs. config L2_CACHE bool "Enable L2 cache support" @@ -1401,12 +1401,12 @@ config SYS_PPC_E500_DEBUG_TLB ARCH_BSC9132 || \ ARCH_C29X help - Select a temporary TLB entry to be used during boot to work - around limitations in e500v1 and e500v2 external debugger - support. This reduces the portions of the boot code where - breakpoints and single stepping do not work. The value of this - symbol should be set to the TLB1 entry to be used for this - purpose. If unsure, do not change. + Select a temporary TLB entry to be used during boot to work + around limitations in e500v1 and e500v2 external debugger + support. This reduces the portions of the boot code where + breakpoints and single stepping do not work. The value of this + symbol should be set to the TLB1 entry to be used for this + purpose. If unsure, do not change. config SYS_FSL_IFC_CLK_DIV int "Divider of platform clock" @@ -1419,8 +1419,8 @@ config SYS_FSL_IFC_CLK_DIV ARCH_T4240 default 1 help - Defines divider of platform clock(clock input to - IFC controller). + Defines divider of platform clock(clock input to + IFC controller). config SYS_FSL_LBC_CLK_DIV int "Divider of platform clock" @@ -1435,8 +1435,8 @@ config SYS_FSL_LBC_CLK_DIV default 1 help - Defines divider of platform clock(clock input to - eLBC controller). + Defines divider of platform clock(clock input to + eLBC controller). config ENABLE_36BIT_PHYS bool "Enable 36bit physical address space support" diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 8f21b78dbe4..ec4d484a669 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -44,9 +44,9 @@ config X86_RUN_64BIT_NO_SPL bool "64-bit" select X86_64 help - Build U-Boot as a 64-bit binary without SPL. As U-Boot enters - in 64-bit mode, the assumption is that the silicon is fully - initialized (MP, page tables, etc.). + Build U-Boot as a 64-bit binary without SPL. As U-Boot enters + in 64-bit mode, the assumption is that the silicon is fully + initialized (MP, page tables, etc.). endchoice @@ -585,11 +585,11 @@ config DCACHE_RAM_MRC_VAR_SIZE not boot. config HAVE_REFCODE - bool "Add a Reference Code binary" - help - Select this option to add a Reference Code binary to the resulting - U-Boot image. This is an Intel binary blob that handles system - initialisation, in this case the PCH and System Agent. + bool "Add a Reference Code binary" + help + Select this option to add a Reference Code binary to the resulting + U-Boot image. This is an Intel binary blob that handles system + initialisation, in this case the PCH and System Agent. Note: Without this binary (on platforms that need it such as broadwell) U-Boot will be missing some critical setup steps. @@ -617,8 +617,8 @@ config SMP_AP_WORK bool depends on SMP help - Allow APs to do other work after initialisation instead of going - to sleep. + Allow APs to do other work after initialisation instead of going + to sleep. config MAX_CPUS int "Maximum number of CPUs permitted" diff --git a/board/alliedtelesis/SBx81LIFKW/Kconfig b/board/alliedtelesis/SBx81LIFKW/Kconfig index 5c2609b7f46..49516b7f007 100644 --- a/board/alliedtelesis/SBx81LIFKW/Kconfig +++ b/board/alliedtelesis/SBx81LIFKW/Kconfig @@ -4,7 +4,7 @@ config SYS_BOARD default "SBx81LIFKW" config SYS_VENDOR - default "alliedtelesis" + default "alliedtelesis" config SYS_CONFIG_NAME default "SBx81LIFKW" diff --git a/board/alliedtelesis/SBx81LIFXCAT/Kconfig b/board/alliedtelesis/SBx81LIFXCAT/Kconfig index 524c2900892..20e02144d3a 100644 --- a/board/alliedtelesis/SBx81LIFXCAT/Kconfig +++ b/board/alliedtelesis/SBx81LIFXCAT/Kconfig @@ -4,7 +4,7 @@ config SYS_BOARD default "SBx81LIFXCAT" config SYS_VENDOR - default "alliedtelesis" + default "alliedtelesis" config SYS_CONFIG_NAME default "SBx81LIFXCAT" diff --git a/board/beagle/beagleboneai64/Kconfig b/board/beagle/beagleboneai64/Kconfig index 0f21582614d..7d7077e9f28 100644 --- a/board/beagle/beagleboneai64/Kconfig +++ b/board/beagle/beagleboneai64/Kconfig @@ -34,7 +34,7 @@ config SYS_BOARD default "beagleboneai64" config SYS_VENDOR - default "beagle" + default "beagle" config SYS_CONFIG_NAME default "beagleboneai64" @@ -49,7 +49,7 @@ config SYS_BOARD default "beagleboneai64" config SYS_VENDOR - default "beagle" + default "beagle" config SYS_CONFIG_NAME default "beagleboneai64" diff --git a/board/beagle/beagleplay/Kconfig b/board/beagle/beagleplay/Kconfig index 592b53e493c..fcc6a5aa496 100644 --- a/board/beagle/beagleplay/Kconfig +++ b/board/beagle/beagleplay/Kconfig @@ -30,13 +30,13 @@ endchoice if TARGET_AM625_A53_BEAGLEPLAY config SYS_BOARD - default "beagleplay" + default "beagleplay" config SYS_VENDOR - default "beagle" + default "beagle" config SYS_CONFIG_NAME - default "beagleplay" + default "beagleplay" source "board/ti/common/Kconfig" @@ -45,13 +45,13 @@ endif if TARGET_AM625_R5_BEAGLEPLAY config SYS_BOARD - default "beagleplay" + default "beagleplay" config SYS_VENDOR - default "beagle" + default "beagle" config SYS_CONFIG_NAME - default "beagleplay" + default "beagleplay" config SPL_LDSCRIPT default "arch/arm/mach-omap2/u-boot-spl.lds" diff --git a/board/beagle/beagley-ai/Kconfig b/board/beagle/beagley-ai/Kconfig index bf953982151..07aedc2ea3f 100644 --- a/board/beagle/beagley-ai/Kconfig +++ b/board/beagle/beagley-ai/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "beagley-ai" config SYS_VENDOR - default "beagle" + default "beagle" config SYS_CONFIG_NAME default "beagley_ai" diff --git a/board/cortina/common/Kconfig b/board/cortina/common/Kconfig index 00c709e70f0..bf5229abd75 100644 --- a/board/cortina/common/Kconfig +++ b/board/cortina/common/Kconfig @@ -1,6 +1,6 @@ config CORTINA_PLATFORM - bool "Cortina-Access Platform" - default y - help - Select this option for Cortina-Access platforms - to enables selection of CAxxxx drivers + bool "Cortina-Access Platform" + default y + help + Select this option for Cortina-Access platforms + to enables selection of CAxxxx drivers diff --git a/board/cortina/presidio-asic/Kconfig b/board/cortina/presidio-asic/Kconfig index 8e6f6cfa27c..7bf8b78742a 100644 --- a/board/cortina/presidio-asic/Kconfig +++ b/board/cortina/presidio-asic/Kconfig @@ -1,7 +1,7 @@ if TARGET_PRESIDIO_ASIC config BIT64 bool - default y + default y select SOC_CA7774 diff --git a/board/firefly/roc-pc-rk3399/Kconfig b/board/firefly/roc-pc-rk3399/Kconfig index c211e9d3c79..b800f7d2102 100644 --- a/board/firefly/roc-pc-rk3399/Kconfig +++ b/board/firefly/roc-pc-rk3399/Kconfig @@ -4,7 +4,7 @@ config SYS_BOARD default "roc-pc-rk3399" config SYS_VENDOR - default "firefly" + default "firefly" config SYS_CONFIG_NAME default "roc-pc-rk3399" diff --git a/board/imgtec/boston/Kconfig b/board/imgtec/boston/Kconfig index 965847d9650..d7d8bfd0a76 100644 --- a/board/imgtec/boston/Kconfig +++ b/board/imgtec/boston/Kconfig @@ -11,7 +11,7 @@ config SYS_CONFIG_NAME config ENV_SOURCE_FILE - default "boston" + default "boston" config TEXT_BASE default 0x9fc00000 if 32BIT diff --git a/board/logicpd/imx6/Kconfig b/board/logicpd/imx6/Kconfig index f5e2f58b12b..dfc196124f3 100644 --- a/board/logicpd/imx6/Kconfig +++ b/board/logicpd/imx6/Kconfig @@ -4,7 +4,7 @@ config SYS_BOARD default "imx6" config SYS_VENDOR - default "logicpd" + default "logicpd" config SYS_CONFIG_NAME default "imx6_logic" diff --git a/board/nxp/ls1012ardb/Kconfig b/board/nxp/ls1012ardb/Kconfig index bbe5ce21109..ff5a57aaa41 100644 --- a/board/nxp/ls1012ardb/Kconfig +++ b/board/nxp/ls1012ardb/Kconfig @@ -63,7 +63,7 @@ config SYS_BOARD default "ls1012ardb" config SYS_VENDOR - default "nxp" + default "nxp" config SYS_SOC default "fsl-layerscape" diff --git a/board/nxp/mx6memcal/Kconfig b/board/nxp/mx6memcal/Kconfig index a6c39d5e4d1..03d8422242f 100644 --- a/board/nxp/mx6memcal/Kconfig +++ b/board/nxp/mx6memcal/Kconfig @@ -35,30 +35,30 @@ choice The choices below reflect the most commonly used options for your UART. - config UART2_EIM_D26_27 - bool "UART2 on EIM_D26/27 (SabreLite, Nitrogen6x)" - depends on SERIAL_CONSOLE_UART2 - help - Choose this configuration if you're using pads - EIM_D26 and D27 for a console on UART2. - This is typical for designs that are based on the - NXP SABRELite. +config UART2_EIM_D26_27 + bool "UART2 on EIM_D26/27 (SabreLite, Nitrogen6x)" + depends on SERIAL_CONSOLE_UART2 + help + Choose this configuration if you're using pads + EIM_D26 and D27 for a console on UART2. + This is typical for designs that are based on the + NXP SABRELite. - config UART1_CSI0_DAT10_11 - bool "UART1 on CSI0_DAT10/11 (Wand, SabreSD)" - depends on SERIAL_CONSOLE_UART1 - help - Choose this configuration if you're using pads - CSI0_DAT10 and DAT11 for a console on UART1 as - is done on the i.MX6 Wand board and i.MX6 SabreSD. +config UART1_CSI0_DAT10_11 + bool "UART1 on CSI0_DAT10/11 (Wand, SabreSD)" + depends on SERIAL_CONSOLE_UART1 + help + Choose this configuration if you're using pads + CSI0_DAT10 and DAT11 for a console on UART1 as + is done on the i.MX6 Wand board and i.MX6 SabreSD. - config UART1_UART1 - bool "UART1 on UART1 (i.MX6SL EVK, WaRP)" - depends on SERIAL_CONSOLE_UART1 - help - Choose this configuration if you're using pads - UART1_TXD/RXD for a console on UART1 as is done - on most i.MX6SL designs. +config UART1_UART1 + bool "UART1 on UART1 (i.MX6SL EVK, WaRP)" + depends on SERIAL_CONSOLE_UART1 + help + Choose this configuration if you're using pads + UART1_TXD/RXD for a console on UART1 as is done + on most i.MX6SL designs. endchoice @@ -215,12 +215,12 @@ config REFR range 0 7 default 7 help - This selects the number of refreshes (-1) during each period. - i.e.: - 0 == 1 refresh (tRFC) - 7 == 8 refreshes (tRFC*8) - See the description of MDREF[REFR] in the reference manual for - details. + This selects the number of refreshes (-1) during each period. + i.e.: + 0 == 1 refresh (tRFC) + 7 == 8 refreshes (tRFC*8) + See the description of MDREF[REFR] in the reference manual for + details. endmenu diff --git a/board/out4/o4-imx6ull-nano/Kconfig b/board/out4/o4-imx6ull-nano/Kconfig index e2ab80b6d4d..1b948fdc9ff 100644 --- a/board/out4/o4-imx6ull-nano/Kconfig +++ b/board/out4/o4-imx6ull-nano/Kconfig @@ -13,21 +13,21 @@ choice prompt "Memory model" default K4B4G1646D_BCMA help - Memory type setup. + Memory type setup. Please choose correct memory model here. config K4B4G1646D_BCMA bool "K4B4G1646D-BCMA 256Mx16 (512 MiB/chip)" help - Samsung DDR3 SDRAM - K4B4G1646D-BCMA + Samsung DDR3 SDRAM + K4B4G1646D-BCMA config MT41K256M16HA_125E bool "MT41K256M16HA-125:E 256Mx16 (512 MiB/chip)" help - Micron DDR3L SDRAM - MT41K256M16HA-125:E + Micron DDR3L SDRAM + MT41K256M16HA-125:E endchoice @@ -35,21 +35,21 @@ choice prompt "Mainboard model" default O4_IMX_NANO help - Mainboard setup. + Mainboard setup. Please choose correct main board model here. config O4_IMX_NANO bool "O4-iMX-NANO" help - A baseboard for EV-iMX280-NANO module: - https://out4.ru/products/board/18-o4-imx-nano.html + A baseboard for EV-iMX280-NANO module: + https://out4.ru/products/board/18-o4-imx-nano.html config EV_IMX280_NANO_X_MB bool "EV-IMX280-NANO-X-MB" help - A simple baseboard for EV-iMX280-NANO module: - http://evodbg.net/products/mx28-eval-kits/14-ev-imx280-nano-x-mb.html + A simple baseboard for EV-iMX280-NANO module: + http://evodbg.net/products/mx28-eval-kits/14-ev-imx280-nano-x-mb.html endchoice diff --git a/board/phytec/common/Kconfig b/board/phytec/common/Kconfig index 6afd03086f7..87fa70632e5 100644 --- a/board/phytec/common/Kconfig +++ b/board/phytec/common/Kconfig @@ -2,14 +2,14 @@ config PHYTEC_SOM_DETECTION bool "Support SoM detection for PHYTEC platforms" select SPL_CRC8 if SPL help - Support of I2C EEPROM based SoM detection. + Support of I2C EEPROM based SoM detection. config PHYTEC_SOM_DETECTION_BLOCKS bool "Extend SoM detection with block support" depends on PHYTEC_SOM_DETECTION help - Extend the I2C EEPROM based SoM detection with API v3. This API - introduces blocks with different payloads. + Extend the I2C EEPROM based SoM detection with API v3. This API + introduces blocks with different payloads. config PHYTEC_IMX8M_SOM_DETECTION bool "Support SoM detection for i.MX8M PHYTEC platforms" @@ -35,8 +35,8 @@ config PHYTEC_AM62_SOM_DETECTION depends on SPL_I2C && DM_I2C default y help - Support of I2C EEPROM based SoM detection. Supported - for PHYTEC AM62x boards. + Support of I2C EEPROM based SoM detection. Supported + for PHYTEC AM62x boards. config PHYTEC_AM62A_SOM_DETECTION bool "Support SoM detection for AM62Ax PHYTEC platforms" @@ -46,8 +46,8 @@ config PHYTEC_AM62A_SOM_DETECTION depends on SPL_I2C && DM_I2C default y help - Support of I2C EEPROM based SoM detection. Supported - for PHYTEC AM62Ax boards. + Support of I2C EEPROM based SoM detection. Supported + for PHYTEC AM62Ax boards. config PHYTEC_AM64_SOM_DETECTION bool "Support SoM detection for AM64x PHYTEC platforms" @@ -57,8 +57,8 @@ config PHYTEC_AM64_SOM_DETECTION depends on SPL_I2C && DM_I2C default y help - Support of I2C EEPROM based SoM detection. Supported - for PHYTEC AM64x boards. + Support of I2C EEPROM based SoM detection. Supported + for PHYTEC AM64x boards. config PHYTEC_EEPROM_BUS int "Board EEPROM's I2C bus number" diff --git a/board/phytec/common/k3/Kconfig b/board/phytec/common/k3/Kconfig index 282f4b79742..4bbe1a5ec3c 100644 --- a/board/phytec/common/k3/Kconfig +++ b/board/phytec/common/k3/Kconfig @@ -1,5 +1,5 @@ config PHYTEC_K3_DDR_PATCH bool "Patch DDR timings on PHYTEC K3 SoMs" help - Allow to override default DDR timings prior to - DDRSS driver probing. + Allow to override default DDR timings prior to + DDRSS driver probing. diff --git a/board/phytec/phycore_am62ax/Kconfig b/board/phytec/phycore_am62ax/Kconfig index 516dc8e2020..e7943c51dbc 100644 --- a/board/phytec/phycore_am62ax/Kconfig +++ b/board/phytec/phycore_am62ax/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "phycore_am62ax" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am62ax" @@ -24,7 +24,7 @@ config SYS_BOARD default "phycore_am62ax" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am62ax" diff --git a/board/phytec/phycore_am62x/Kconfig b/board/phytec/phycore_am62x/Kconfig index ecee5873c0c..feacc3d6d40 100644 --- a/board/phytec/phycore_am62x/Kconfig +++ b/board/phytec/phycore_am62x/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "phycore_am62x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am62x" @@ -24,7 +24,7 @@ config SYS_BOARD default "phycore_am62x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am62x" @@ -38,31 +38,31 @@ source "board/phytec/common/k3/Kconfig" endif config PHYCORE_AM62X_RAM_SIZE_FIX - bool "Set phyCORE-AM62x RAM size fix instead of detecting" - default false - help - RAM size is automatic being detected with the help of - the EEPROM introspection data. Set RAM size to a fix value - instead. + bool "Set phyCORE-AM62x RAM size fix instead of detecting" + default false + help + RAM size is automatic being detected with the help of + the EEPROM introspection data. Set RAM size to a fix value + instead. choice - prompt "phyCORE-AM62x RAM size" - depends on PHYCORE_AM62X_RAM_SIZE_FIX - default PHYCORE_AM62X_RAM_SIZE_2GB + prompt "phyCORE-AM62x RAM size" + depends on PHYCORE_AM62X_RAM_SIZE_FIX + default PHYCORE_AM62X_RAM_SIZE_2GB config PHYCORE_AM62X_RAM_SIZE_1GB - bool "1GB RAM" - help - Set RAM size fix to 1GB for phyCORE-AM62x. + bool "1GB RAM" + help + Set RAM size fix to 1GB for phyCORE-AM62x. config PHYCORE_AM62X_RAM_SIZE_2GB - bool "2GB RAM" - help - Set RAM size fix to 2GB for phyCORE-AM62x. + bool "2GB RAM" + help + Set RAM size fix to 2GB for phyCORE-AM62x. config PHYCORE_AM62X_RAM_SIZE_4GB - bool "4GB RAM" - help - Set RAM size fix to 4GB for phyCORE-AM62x. + bool "4GB RAM" + help + Set RAM size fix to 4GB for phyCORE-AM62x. endchoice diff --git a/board/phytec/phycore_am64x/Kconfig b/board/phytec/phycore_am64x/Kconfig index a709b71ba4d..a4d25b84b96 100644 --- a/board/phytec/phycore_am64x/Kconfig +++ b/board/phytec/phycore_am64x/Kconfig @@ -12,7 +12,7 @@ config SYS_BOARD default "phycore_am64x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am64x" @@ -27,7 +27,7 @@ config SYS_BOARD default "phycore_am64x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am64x" @@ -37,26 +37,26 @@ source "board/phytec/common/Kconfig" endif config PHYCORE_AM64X_RAM_SIZE_FIX - bool "Set phyCORE-AM64x RAM size fix instead of detecting" - default false - help - RAM size is automatic being detected with the help of - the EEPROM introspection data. Set RAM size to a fix value - instead. + bool "Set phyCORE-AM64x RAM size fix instead of detecting" + default false + help + RAM size is automatic being detected with the help of + the EEPROM introspection data. Set RAM size to a fix value + instead. choice - prompt "phyCORE-AM64x RAM size" - depends on PHYCORE_AM64X_RAM_SIZE_FIX - default PHYCORE_AM64X_RAM_SIZE_2GB + prompt "phyCORE-AM64x RAM size" + depends on PHYCORE_AM64X_RAM_SIZE_FIX + default PHYCORE_AM64X_RAM_SIZE_2GB config PHYCORE_AM64X_RAM_SIZE_1GB - bool "1GB RAM" - help - Set RAM size fix to 1GB for phyCORE-AM64x. + bool "1GB RAM" + help + Set RAM size fix to 1GB for phyCORE-AM64x. config PHYCORE_AM64X_RAM_SIZE_2GB - bool "2GB RAM" - help - Set RAM size fix to 2GB for phyCORE-AM64x. + bool "2GB RAM" + help + Set RAM size fix to 2GB for phyCORE-AM64x. endchoice diff --git a/board/phytec/phycore_am68x/Kconfig b/board/phytec/phycore_am68x/Kconfig index 37912fb4ed3..d82cdaf819b 100644 --- a/board/phytec/phycore_am68x/Kconfig +++ b/board/phytec/phycore_am68x/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "phycore_am68x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am68x" @@ -27,7 +27,7 @@ config SYS_BOARD default "phycore_am68x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am68x" diff --git a/board/samsung/axy17lte/Kconfig b/board/samsung/axy17lte/Kconfig index 64a4ffa7e67..d98da0ecab5 100644 --- a/board/samsung/axy17lte/Kconfig +++ b/board/samsung/axy17lte/Kconfig @@ -11,8 +11,8 @@ config SYS_CONFIG_NAME default "exynos78x0-common" config EXYNOS7880 - bool "Exynos 7880 SOC support" - default y + bool "Exynos 7880 SOC support" + default y endif if TARGET_A7Y17LTE @@ -28,8 +28,8 @@ config SYS_CONFIG_NAME default "exynos78x0-common" config EXYNOS7880 - bool "Exynos 7880 SOC support" - default y + bool "Exynos 7880 SOC support" + default y endif if TARGET_A3Y17LTE @@ -45,6 +45,6 @@ config SYS_CONFIG_NAME default "exynos78x0-common" config EXYNOS7870 - bool "Exynos 7870 SOC support" - default y + bool "Exynos 7870 SOC support" + default y endif diff --git a/board/siemens/draco/Kconfig b/board/siemens/draco/Kconfig index 9d45c4239be..3f2e75b03fe 100644 --- a/board/siemens/draco/Kconfig +++ b/board/siemens/draco/Kconfig @@ -33,10 +33,10 @@ endif if TARGET_ETAMIN config SYS_BOARD - default "draco" + default "draco" config SYS_VENDOR - default "siemens" + default "siemens" config SYS_SOC default "am33xx" diff --git a/board/socionext/developerbox/Kconfig b/board/socionext/developerbox/Kconfig index c181d26a44a..1b1c9181bad 100644 --- a/board/socionext/developerbox/Kconfig +++ b/board/socionext/developerbox/Kconfig @@ -11,10 +11,10 @@ config TARGET_DEVELOPERBOX select SYS_DISABLE_DCACHE_OPS select OF_BOARD_SETUP help - Choose this option if you build the U-Boot for the DeveloperBox - 96boards Enterprise Edition. - This board will booted from SCP firmware and it enables SMMU, thus - the dcache is updated automatically when DMA operation is executed. + Choose this option if you build the U-Boot for the DeveloperBox + 96boards Enterprise Edition. + This board will booted from SCP firmware and it enables SMMU, thus + the dcache is updated automatically when DMA operation is executed. endchoice config SYS_SOC diff --git a/board/sysam/amcore/Kconfig b/board/sysam/amcore/Kconfig index b5c81dda237..7efd857dc32 100644 --- a/board/sysam/amcore/Kconfig +++ b/board/sysam/amcore/Kconfig @@ -4,13 +4,13 @@ config SYS_CPU default "mcf530x" config SYS_BOARD - default "amcore" + default "amcore" config SYS_VENDOR - default "sysam" + default "sysam" config SYS_CONFIG_NAME - default "amcore" + default "amcore" endif diff --git a/board/ti/am62ax/Kconfig b/board/ti/am62ax/Kconfig index 51e7b3e0eab..a80ea9149b1 100644 --- a/board/ti/am62ax/Kconfig +++ b/board/ti/am62ax/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "am62ax" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "am62ax_evm" diff --git a/board/ti/am62px/Kconfig b/board/ti/am62px/Kconfig index 9d95ffd9b29..1011b89d75f 100644 --- a/board/ti/am62px/Kconfig +++ b/board/ti/am62px/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "am62px" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "am62px_evm" diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig index 610dacfdc08..eb54154d1ce 100644 --- a/board/ti/am62x/Kconfig +++ b/board/ti/am62x/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "am62x" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "am62x_evm" @@ -24,7 +24,7 @@ config SYS_BOARD default "am62x" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "am62x_evm" diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig index b873476a9d5..c727b7f8c16 100644 --- a/board/ti/am64x/Kconfig +++ b/board/ti/am64x/Kconfig @@ -8,7 +8,7 @@ config SYS_BOARD default "am64x" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "am64x_evm" @@ -23,7 +23,7 @@ config SYS_BOARD default "am64x" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "am64x_evm" diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig index eb47a25c70a..fe3fa13dc4b 100644 --- a/board/ti/am65x/Kconfig +++ b/board/ti/am65x/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "am65x" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "am65x_evm" @@ -24,7 +24,7 @@ config SYS_BOARD default "am65x" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "am65x_evm" diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig index 149909093b3..6762d08d400 100644 --- a/board/ti/common/Kconfig +++ b/board/ti/common/Kconfig @@ -1,8 +1,8 @@ config TI_I2C_BOARD_DETECT bool "Support for Board detection for TI platforms" help - Support for detection board information on Texas Instrument's - Evaluation Boards which have I2C based EEPROM detection + Support for detection board information on Texas Instrument's + Evaluation Boards which have I2C based EEPROM detection config EEPROM_BUS_ADDRESS int "Board EEPROM's I2C bus address" diff --git a/board/ti/j7200/Kconfig b/board/ti/j7200/Kconfig index 093d23e7bf8..38edbe12968 100644 --- a/board/ti/j7200/Kconfig +++ b/board/ti/j7200/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "j7200" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j721e_evm" @@ -27,7 +27,7 @@ config SYS_BOARD default "j7200" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j721e_evm" diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig index 7c7e23988d8..d85056e65bb 100644 --- a/board/ti/j721e/Kconfig +++ b/board/ti/j721e/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "j721e" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j721e_evm" @@ -27,7 +27,7 @@ config SYS_BOARD default "j721e" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j721e_evm" diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig index 40853a8fd66..34a3e6ef187 100644 --- a/board/ti/j721s2/Kconfig +++ b/board/ti/j721s2/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "j721s2" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j721s2_evm" @@ -27,7 +27,7 @@ config SYS_BOARD default "j721s2" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j721s2_evm" diff --git a/board/ti/j722s/Kconfig b/board/ti/j722s/Kconfig index 68c214e473b..e819ba2f554 100644 --- a/board/ti/j722s/Kconfig +++ b/board/ti/j722s/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "j722s" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j722s_evm" diff --git a/board/ti/j784s4/Kconfig b/board/ti/j784s4/Kconfig index de95ac575d7..40c4913aea1 100644 --- a/board/ti/j784s4/Kconfig +++ b/board/ti/j784s4/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "j784s4" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j784s4_evm" @@ -24,7 +24,7 @@ config SYS_BOARD default "j784s4" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j784s4_evm" @@ -42,7 +42,7 @@ config SYS_BOARD default "j784s4" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j784s4_evm" @@ -57,7 +57,7 @@ config SYS_BOARD default "j784s4" config SYS_VENDOR - default "ti" + default "ti" config SYS_CONFIG_NAME default "j784s4_evm" diff --git a/board/toradex/apalis_imx6/Kconfig b/board/toradex/apalis_imx6/Kconfig index c6ff387351c..fc4cbe3323c 100644 --- a/board/toradex/apalis_imx6/Kconfig +++ b/board/toradex/apalis_imx6/Kconfig @@ -35,7 +35,7 @@ config TDX_CMD_IMX_MFGR bool "Enable factory testing commands for Toradex iMX 6 modules" help This adds the commands - pf0100_otp_prog - Program the OTP fuses on the PMIC PF0100 + pf0100_otp_prog - Program the OTP fuses on the PMIC PF0100 If executed on already fused modules it doesn't change any fuse setting. default y @@ -43,11 +43,11 @@ config TDX_APALIS_IMX6_V1_0 bool "Apalis iMX6 V1.0 HW" help Apalis iMX6 V1.0 HW has a different pinout for the UART. - The UARTs must be used in DCE mode, RTS/CTS are swapped and - thus unusable on standard carrier boards. - This option configures DCE mode unconditionally. Whithout this - option the config block stating V1.0 HW selects DCE mode, - otherwise the UARTs are configuered in DTE mode. + The UARTs must be used in DCE mode, RTS/CTS are swapped and + thus unusable on standard carrier boards. + This option configures DCE mode unconditionally. Whithout this + option the config block stating V1.0 HW selects DCE mode, + otherwise the UARTs are configuered in DTE mode. source "board/toradex/common/Kconfig" diff --git a/board/toradex/aquila-am69/Kconfig b/board/toradex/aquila-am69/Kconfig index 6afa97e2c82..b44b9247603 100644 --- a/board/toradex/aquila-am69/Kconfig +++ b/board/toradex/aquila-am69/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "aquila-am69" config SYS_VENDOR - default "toradex" + default "toradex" config SYS_CONFIG_NAME default "aquila-am69" @@ -48,7 +48,7 @@ config SYS_BOARD default "aquila-am69" config SYS_VENDOR - default "toradex" + default "toradex" config SYS_CONFIG_NAME default "aquila-am69" diff --git a/board/toradex/colibri_imx6/Kconfig b/board/toradex/colibri_imx6/Kconfig index d2ad1ce2a03..53d3469d439 100644 --- a/board/toradex/colibri_imx6/Kconfig +++ b/board/toradex/colibri_imx6/Kconfig @@ -35,7 +35,7 @@ config TDX_CMD_IMX_MFGR bool "Enable factory testing commands for Toradex iMX 6 modules" help This adds the commands - pf0100_otp_prog - Program the OTP fuses on the PMIC PF0100 + pf0100_otp_prog - Program the OTP fuses on the PMIC PF0100 If executed on already fused modules it doesn't change any fuse setting. default y diff --git a/board/toradex/verdin-am62p/Kconfig b/board/toradex/verdin-am62p/Kconfig index a65caf3c26d..4f5968bca2e 100644 --- a/board/toradex/verdin-am62p/Kconfig +++ b/board/toradex/verdin-am62p/Kconfig @@ -8,22 +8,22 @@ choice optional config TARGET_VERDIN_AM62P_A53 - bool "Toradex Verdin AM62P running on A53" - select ARM64 - select BINMAN - select OF_SYSTEM_SETUP - imply OF_UPSTREAM + bool "Toradex Verdin AM62P running on A53" + select ARM64 + select BINMAN + select OF_SYSTEM_SETUP + imply OF_UPSTREAM config TARGET_VERDIN_AM62P_R5 - bool "Toradex Verdin AM62P running on R5" - select CPU_V7R - select SYS_THUMB_BUILD - select K3_LOAD_SYSFW - select RAM - select SPL_RAM - select K3_DDRSS - select BINMAN - imply SYS_K3_SPL_ATF + bool "Toradex Verdin AM62P running on R5" + select CPU_V7R + select SYS_THUMB_BUILD + select K3_LOAD_SYSFW + select RAM + select SPL_RAM + select K3_DDRSS + select BINMAN + imply SYS_K3_SPL_ATF endchoice diff --git a/board/traverse/common/Kconfig b/board/traverse/common/Kconfig index d34832bd0d3..96b2566b697 100644 --- a/board/traverse/common/Kconfig +++ b/board/traverse/common/Kconfig @@ -2,5 +2,5 @@ config TEN64_CONTROLLER bool "Enable Ten64 board controller driver" depends on TARGET_TEN64 help - Support for the board microcontroller on the Traverse - Ten64 family of boards. + Support for the board microcontroller on the Traverse + Ten64 family of boards. diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig index 5c3240da073..07fc8da1b71 100644 --- a/board/xilinx/Kconfig +++ b/board/xilinx/Kconfig @@ -67,7 +67,7 @@ config BOOT_SCRIPT_OFFSET default 0x7F80000 if ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2 default 0 if TARGET_XILINX_MBV help - Specifies distro boot script offset in NAND/QSPI/NOR flash. + Specifies distro boot script offset in NAND/QSPI/NOR flash. config CMD_FRU bool "FRU information for product" diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index ea785793d18..0b52515c700 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -647,6 +647,7 @@ config IHS_FPGA gdsys devices, which supply the majority of the functionality offered by the devices. This driver supports both CON and CPU variants of the devices, depending on the device tree entry. + config ESM_K3 bool "Enable K3 ESM driver" depends on ARCH_K3 diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 5bc14842e66..8504ae2b079 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -376,7 +376,7 @@ config DM_PMIC_TPS80031 This config enables implementation of driver-model pmic uclass features for TPS80031/TPS80032 PMICs. The driver implements read/write operations. This is a Power Management IC with a decent set of peripherals from which - 5 Buck Converters refered as Switched-mode power supply (SMPS), 11 General- + 5 Buck Converters referred as Switched-mode power supply (SMPS), 11 General- Purpose Low-Dropout Voltage Regulators (LDO), USB OTG Module, Real-Time Clock (RTC) with Timer and Alarm Wake-Up, Two Digital PWM Outputs and more with I2C Compatible Interface. PMIC occupies 4 I2C addresses. diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 33a82ca3bf1..0015dec1062 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -47,7 +47,7 @@ config RCAR_GEN3_THERMAL config TI_DRA7_THERMAL bool "Temperature sensor driver for TI dra7xx SOCs" help - Enable thermal support for for the Texas Instruments DRA752 SoC family. + Enable thermal support for the Texas Instruments DRA752 SoC family. The driver supports reading CPU temperature. config TI_LM74_THERMAL |