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-rw-r--r--board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c4
-rw-r--r--include/configs/p1_p2_rdb_pc.h3
2 files changed, 6 insertions, 1 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 1e6dfe87d8b..dde0c1dcd2d 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -216,6 +216,10 @@ int checkboard(void)
puts("rom_loc: ");
if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SD) {
puts("sd");
+#ifdef __SW_BOOT_SD2
+ } else if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SD2) {
+ puts("sd");
+#endif
#ifdef __SW_BOOT_SPI
} else if ((val & (~__SW_BOOT_MASK)) == __SW_BOOT_SPI) {
puts("spi");
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 81dc0177c0c..cc703309e3e 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -57,7 +57,8 @@
#define __SW_BOOT_MASK 0x03
#define __SW_BOOT_NOR 0xc8
#define __SW_BOOT_SPI 0x28
-#define __SW_BOOT_SD 0x68 /* or 0x18 */
+#define __SW_BOOT_SD 0x68
+#define __SW_BOOT_SD2 0x18
#define __SW_BOOT_NAND 0xe8
#define __SW_BOOT_PCIE 0xa8
#define CONFIG_SYS_L2_SIZE (512 << 10)