summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--drivers/clk/mediatek/clk-mt7988.c37
1 files changed, 20 insertions, 17 deletions
diff --git a/drivers/clk/mediatek/clk-mt7988.c b/drivers/clk/mediatek/clk-mt7988.c
index 6637ab4c287..2208185274a 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -846,31 +846,36 @@ static int mt7988_clk_probe(struct udevice *dev)
}
static const struct udevice_id mt7988_fixed_pll_compat[] = {
- { .compatible = "mediatek,mt7988-fixed-plls" },
- { .compatible = "mediatek,mt7988-apmixedsys" },
+ {
+ .compatible = "mediatek,mt7988-fixed-plls",
+ .data = (ulong)&mt7988_fixed_pll_clk_tree,
+ },
+ {
+ .compatible = "mediatek,mt7988-apmixedsys",
+ .data = (ulong)&mt7988_fixed_pll_clk_tree,
+ },
{}
};
static const struct udevice_id mt7988_topckgen_compat[] = {
- { .compatible = "mediatek,mt7988-topckgen" },
+ {
+ .compatible = "mediatek,mt7988-topckgen",
+ .data = (ulong)&mt7988_topckgen_clk_tree,
+ },
{}
};
-static int mt7988_fixed_pll_probe(struct udevice *dev)
-{
- return mtk_common_clk_init(dev, &mt7988_fixed_pll_clk_tree);
-}
-
static int mt7988_topckgen_probe(struct udevice *dev)
{
struct mtk_clk_priv *priv = dev_get_priv(dev);
+ const struct mtk_clk_tree *tree = (void *)dev_get_driver_data(dev);
priv->base = dev_read_addr_ptr(dev);
if (!priv->base)
return -ENOENT;
writel(MT7988_CLK_PDN_EN_WRITE, priv->base + MT7988_CLK_PDN);
- return mtk_common_clk_init(dev, &mt7988_topckgen_clk_tree);
+ return mtk_common_clk_init(dev, tree);
}
U_BOOT_DRIVER(mt7988_clk_apmixedsys) = {
@@ -878,7 +883,7 @@ U_BOOT_DRIVER(mt7988_clk_apmixedsys) = {
.id = UCLASS_CLK,
.of_match = mt7988_fixed_pll_compat,
.bind = mtk_common_clk_parent_bind,
- .probe = mt7988_fixed_pll_probe,
+ .probe = mt7988_clk_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_fixed_pll_ops,
.flags = DM_FLAG_PRE_RELOC,
@@ -896,21 +901,19 @@ U_BOOT_DRIVER(mt7988_clk_topckgen) = {
};
static const struct udevice_id mt7988_infracfg_compat[] = {
- { .compatible = "mediatek,mt7988-infracfg" },
+ {
+ .compatible = "mediatek,mt7988-infracfg",
+ .data = (ulong)&mt7988_infracfg_clk_tree,
+ },
{}
};
-static int mt7988_infracfg_probe(struct udevice *dev)
-{
- return mtk_common_clk_init(dev, &mt7988_infracfg_clk_tree);
-}
-
U_BOOT_DRIVER(mt7988_clk_infracfg) = {
.name = "mt7988-clock-infracfg",
.id = UCLASS_CLK,
.of_match = mt7988_infracfg_compat,
.bind = mtk_common_clk_parent_bind,
- .probe = mt7988_infracfg_probe,
+ .probe = mt7988_clk_probe,
.priv_auto = sizeof(struct mtk_clk_priv),
.ops = &mtk_clk_infrasys_ops,
.flags = DM_FLAG_PRE_RELOC,