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-rw-r--r--arch/arm/mach-k3/am64x/boot.c36
-rw-r--r--arch/arm/mach-k3/include/mach/am64_hardware.h18
2 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/am64x/boot.c b/arch/arm/mach-k3/am64x/boot.c
index ce8ae941be6..bf8e1a5cb44 100644
--- a/arch/arm/mach-k3/am64x/boot.c
+++ b/arch/arm/mach-k3/am64x/boot.c
@@ -103,3 +103,39 @@ u32 get_boot_device(void)
return bootmedia;
}
+
+const char *get_reset_reason(void)
+{
+ u32 reset_reason = readl(CTRLMMR_MCU_RST_SRC);
+
+ /* After reading reset source register, software must clear it */
+ if (reset_reason)
+ writel(reset_reason, CTRLMMR_MCU_RST_SRC);
+
+ if (reset_reason == 0 ||
+ (reset_reason & (RST_SRC_SW_MAIN_POR_FROM_MAIN |
+ RST_SRC_SW_MAIN_POR_FROM_MCU)))
+ return "POR";
+
+ if (reset_reason & (RST_SRC_SAFETY_ERR | RST_SRC_MAIN_ESM_ERR))
+ return "ESM";
+
+ if (reset_reason & (RST_SRC_SW_MAIN_WARM_FROM_MAIN |
+ RST_SRC_SW_MAIN_WARM_FROM_MCU |
+ RST_SRC_SW_MCU_WARM_RST))
+ return "RST";
+
+ if (reset_reason & (RST_SRC_SMS_WARM_RST | RST_SRC_SMS_COLD_RST))
+ return "DMSC";
+
+ if (reset_reason & RST_SRC_DEBUG_RST)
+ return "JTAG";
+
+ if (reset_reason & RST_SRC_THERMAL_RST)
+ return "THERMAL";
+
+ if (reset_reason & (RST_SRC_MAIN_RESET_PIN | RST_SRC_MCU_RESET_PIN))
+ return "PIN";
+
+ return "UNKNOWN";
+}
diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h
index 105b42986de..2717da07690 100644
--- a/arch/arm/mach-k3/include/mach/am64_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am64_hardware.h
@@ -46,6 +46,24 @@
/* Use Last 2K as Scratch pad */
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x7019f800
+/* Reset Reason Detection */
+#define CTRLMMR_MCU_RST_SRC (MCU_CTRL_MMR0_BASE + 0x18178)
+
+/* Reset causes by bit mapping */
+#define RST_SRC_SAFETY_ERR BIT(31)
+#define RST_SRC_MAIN_ESM_ERR BIT(30)
+#define RST_SRC_SW_MAIN_POR_FROM_MAIN BIT(25)
+#define RST_SRC_SW_MAIN_POR_FROM_MCU BIT(24)
+#define RST_SRC_SW_MAIN_WARM_FROM_MAIN BIT(21)
+#define RST_SRC_SW_MAIN_WARM_FROM_MCU BIT(20)
+#define RST_SRC_SW_MCU_WARM_RST BIT(16)
+#define RST_SRC_SMS_WARM_RST BIT(13)
+#define RST_SRC_SMS_COLD_RST BIT(12)
+#define RST_SRC_DEBUG_RST BIT(8)
+#define RST_SRC_THERMAL_RST BIT(4)
+#define RST_SRC_MAIN_RESET_PIN BIT(2)
+#define RST_SRC_MCU_RESET_PIN BIT(0)
+
#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
#define AM64X_DEV_RTI8 127