diff options
| -rw-r--r-- | arch/arm/mach-omap2/am33xx/ddr.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/am33xx/emif4.c | 21 |
2 files changed, 16 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c index 41eec005cb1..a40813a99d8 100644 --- a/arch/arm/mach-omap2/am33xx/ddr.c +++ b/arch/arm/mach-omap2/am33xx/ddr.c @@ -185,10 +185,10 @@ void config_sdram(const struct emif_regs *regs, int nr) if (regs->zq_config) { writel(regs->zq_config, &emif_reg[nr]->emif_zq_config); writel(regs->sdram_config, &cstat->secure_emif_sdram_config); - writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config); /* Trigger initialization */ writel(0x00003100, &emif_reg[nr]->emif_sdram_ref_ctrl); + writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config); /* Wait 1ms because of L3 timeout error */ udelay(1000); diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c index f19c66822d2..96e239b31a0 100644 --- a/arch/arm/mach-omap2/am33xx/emif4.c +++ b/arch/arm/mach-omap2/am33xx/emif4.c @@ -29,12 +29,21 @@ static struct cm_device_inst *cm_device = static void config_vtp(int nr) { - writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE, - &vtpreg[nr]->vtp0ctrlreg); - writel(readl(&vtpreg[nr]->vtp0ctrlreg) & (~VTP_CTRL_START_EN), - &vtpreg[nr]->vtp0ctrlreg); - writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_START_EN, - &vtpreg[nr]->vtp0ctrlreg); + /* + * A warm reset will result in DDR going into self refresh. Once the + * reset is released we will exit self refresh and resume normally + * so a reinitialization of the controller is not needed. + * + * Check to see if VTP is ready before we reinitialize the controller + */ + if ((readl(&vtpreg[nr]->vtp0ctrlreg) & VTP_CTRL_READY) != VTP_CTRL_READY) { + writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE, + &vtpreg[nr]->vtp0ctrlreg); + writel(readl(&vtpreg[nr]->vtp0ctrlreg) & (~VTP_CTRL_START_EN), + &vtpreg[nr]->vtp0ctrlreg); + writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_START_EN, + &vtpreg[nr]->vtp0ctrlreg); + } /* Poll for READY */ while ((readl(&vtpreg[nr]->vtp0ctrlreg) & VTP_CTRL_READY) != |