summaryrefslogtreecommitdiff
path: root/arch/arm/lib
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/lib')
-rw-r--r--arch/arm/lib/Makefile5
-rw-r--r--arch/arm/lib/bitops.S45
-rw-r--r--arch/arm/lib/gic-v3-its.c1
3 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 62cf80f3739..b1bcd374662 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -113,6 +113,11 @@ AFLAGS_REMOVE_memset.o := -mthumb -mthumb-interwork
AFLAGS_REMOVE_memcpy.o := -mthumb -mthumb-interwork
AFLAGS_memset.o := -DMEMSET_NO_THUMB_BUILD
AFLAGS_memcpy.o := -DMEMCPY_NO_THUMB_BUILD
+
+# This is only necessary to force ARM mode on THUMB1 targets.
+ifneq ($(CONFIG_SYS_ARM_ARCH),4)
+obj-y += bitops.o
+endif
endif
endif
diff --git a/arch/arm/lib/bitops.S b/arch/arm/lib/bitops.S
new file mode 100644
index 00000000000..29d15246346
--- /dev/null
+++ b/arch/arm/lib/bitops.S
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Sean Anderson <[email protected]>
+ *
+ * ARM bitops to call when using THUMB1, which doesn't have these instructions.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+.pushsection .text.__fls
+ENTRY(__fls)
+ clz r0, r0
+ rsb r0, r0, #31
+ ret lr
+ENDPROC(__fls)
+.popsection
+
+.pushsection .text.__ffs
+ENTRY(__ffs)
+ rsb r3, r0, #0
+ and r0, r0, r3
+ clz r0, r0
+ rsb r0, r0, #31
+ ret lr
+ENDPROC(__ffs)
+.popsection
+
+.pushsection .text.fls
+ENTRY(fls)
+ cmp r0, #0
+ clzne r0, r0
+ rsbne r0, r0, #32
+ ret lr
+ENDPROC(fls)
+.popsection
+
+.pushsection .text.ffs
+ENTRY(ffs)
+ rsb r3, r0, #0
+ and r0, r0, r3
+ clz r0, r0
+ rsb r0, r0, #32
+ ret lr
+ENDPROC(ffs)
+.popsection
diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c
index f6211a2d92c..f4bbd21da91 100644
--- a/arch/arm/lib/gic-v3-its.c
+++ b/arch/arm/lib/gic-v3-its.c
@@ -9,6 +9,7 @@
#include <asm/gic-v3.h>
#include <asm/io.h>
#include <linux/bitops.h>
+#include <linux/printk.h>
#include <linux/sizes.h>
static u32 lpi_id_bits;