diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/exynos7870-a2corelte-u-boot.dtsi | 26 | ||||
| -rw-r--r-- | arch/arm/dts/exynos7870-j6lte-u-boot.dtsi | 46 | ||||
| -rw-r--r-- | arch/arm/dts/exynos7870-on7xelte-u-boot.dtsi | 41 |
3 files changed, 113 insertions, 0 deletions
diff --git a/arch/arm/dts/exynos7870-a2corelte-u-boot.dtsi b/arch/arm/dts/exynos7870-a2corelte-u-boot.dtsi new file mode 100644 index 00000000000..7d97afcc64f --- /dev/null +++ b/arch/arm/dts/exynos7870-a2corelte-u-boot.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2026 Kaustabh Chakraborty <[email protected]> + */ + +/ { + /* These properties are required by S-BOOT. */ + model_info-chip = <7870>; + model_info-hw_rev = <0>; + model_info-hw_rev_end = <255>; + + chosen { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + framebuffer@67000000 { + compatible = "simple-framebuffer"; + reg = <0x0 0x67000000 (540 * 960 * 4)>; + width = <540>; + height = <960>; + stride = <(540 * 4)>; + format = "a8r8g8b8"; + }; + }; +}; diff --git a/arch/arm/dts/exynos7870-j6lte-u-boot.dtsi b/arch/arm/dts/exynos7870-j6lte-u-boot.dtsi new file mode 100644 index 00000000000..aa499ecf479 --- /dev/null +++ b/arch/arm/dts/exynos7870-j6lte-u-boot.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Kaustabh Chakraborty <[email protected]> + */ + +/ { + /* These properties are required by S-BOOT. */ + model_info-chip = <7870>; + model_info-hw_rev = <0>; + model_info-hw_rev_end = <255>; + + chosen { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + framebuffer@67000000 { + compatible = "simple-framebuffer"; + reg = <0x0 0x67000000 (720 * 1480 * 4)>; + width = <720>; + height = <1480>; + stride = <(720 * 4)>; + format = "a8r8g8b8"; + }; + }; + + /* + * S-BOOT will populate the memory nodes stated below. Existing + * values redefine the safe memory requirements as stated in upstream + * device tree, in separate nodes for each bank. + */ + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x3d800000>; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x40000000>; + }; + + memory@100000000 { + device_type = "memory"; + reg = <0x1 0x00000000 0x00000000>; + }; +}; diff --git a/arch/arm/dts/exynos7870-on7xelte-u-boot.dtsi b/arch/arm/dts/exynos7870-on7xelte-u-boot.dtsi new file mode 100644 index 00000000000..01c3e95b0b3 --- /dev/null +++ b/arch/arm/dts/exynos7870-on7xelte-u-boot.dtsi @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2026 Kaustabh Chakraborty <[email protected]> + */ + +/ { + /* These properties are required by S-BOOT. */ + model_info-chip = <7870>; + model_info-hw_rev = <0>; + model_info-hw_rev_end = <255>; + + chosen { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + framebuffer@67000000 { + compatible = "simple-framebuffer"; + reg = <0x0 0x67000000 (1080 * 1920 * 4)>; + width = <1080>; + height = <1920>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + }; + }; + + /* + * S-BOOT will populate the memory nodes stated below. Existing + * values redefine the safe memory requirements as stated in upstream + * device tree, in separate nodes for each bank. + */ + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x3e400000>; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x80000000>; + }; +}; |