diff options
Diffstat (limited to 'board/nxp')
45 files changed, 2428 insertions, 152 deletions
diff --git a/board/nxp/common/vid.c b/board/nxp/common/vid.c index 84cb43fad56..70c3b3ecfd8 100644 --- a/board/nxp/common/vid.c +++ b/board/nxp/common/vid.c @@ -11,6 +11,7 @@ #include <i2c.h> #include <irq_func.h> #include <log.h> +#include <pmbus.h> #include <vsprintf.h> #include <asm/io.h> #ifdef CONFIG_FSL_LSCH2 @@ -260,45 +261,38 @@ static int read_voltage_from_IR(int i2caddress) */ #define VOUT_WARNING "VID: VOUT_MODE exponent has resolution worse than 1 V!\n" -/* Checks the PMBus voltage monitor for the format used for voltage values */ -static int get_pmbus_multiplier(DEVICE_HANDLE_T dev) +/* + * Read VOUT_MODE for downstream LINEAR16 decode/encode through the + * tree level <pmbus.h> helpers (pmbus_reg2data_linear16, + * pmbus_data2reg_linear16). Stores the raw VOUT_MODE byte in *mode + * and returns 0 on success, or the negative bus error (a failed read + * must not be decoded: raw 0 aliases Linear mode with exponent 0). + * Emits VOUT_WARNING on Linear mode chips with a non negative + * exponent (resolution >= 1 V is unusable for sub volt SoC rails) + * and an informational note on the unsupported VID format. + */ +static int vid_read_vout_mode(DEVICE_HANDLE_T dev, u8 *mode) { - u8 mode; - int exponent, multiplier, ret; + int ret; - ret = I2C_READ(dev, PMBUS_CMD_VOUT_MODE, &mode, sizeof(mode)); + ret = pmbus_read_byte(dev, PMBUS_VOUT_MODE, mode); if (ret) { printf("VID: unable to determine voltage multiplier\n"); - return 1; + return ret; } - /* Upper 3 bits is mode, lower 5 bits is exponent */ - exponent = (int)mode & 0x1F; - mode >>= 5; - switch (mode) { - case 0: - /* Linear, 5 bit twos component exponent */ - if (exponent & 0x10) { - multiplier = 1 << (16 - (exponent & 0xF)); - } else { - /* If exponent is >= 0, then resolution is 1 V! */ + switch (*mode & PB_VOUT_MODE_MODE_MASK) { + case PB_VOUT_MODE_LINEAR: + if (!(*mode & 0x10)) printf(VOUT_WARNING); - multiplier = 1; - } break; - case 1: - /* VID code identifier */ + case PB_VOUT_MODE_VID: printf("VID: custom VID codes are not supported\n"); - multiplier = MV_PER_V; break; default: - /* Direct, in mV */ - multiplier = MV_PER_V; break; } - - debug("VID: calculated multiplier is %d\n", multiplier); - return multiplier; + return 0; } #endif @@ -306,8 +300,8 @@ static int get_pmbus_multiplier(DEVICE_HANDLE_T dev) defined(CONFIG_VOL_MONITOR_LTC3882_READ) static int read_voltage_from_pmbus(int i2caddress) { - int ret, multiplier, vout; - u8 channel = PWM_CHANNEL0; + int ret, vout; + u8 channel = PWM_CHANNEL0, vout_mode; u16 vcode; DEVICE_HANDLE_T dev; @@ -317,25 +311,33 @@ static int read_voltage_from_pmbus(int i2caddress) return ret; /* Select the right page */ - ret = I2C_WRITE(dev, PMBUS_CMD_PAGE, &channel, sizeof(channel)); + ret = pmbus_write_byte(dev, PMBUS_PAGE, channel); if (ret) { printf("VID: failed to select VDD page %d\n", channel); return ret; } - /* VOUT is little endian */ - ret = I2C_READ(dev, PMBUS_CMD_READ_VOUT, (void *)&vcode, sizeof(vcode)); + ret = pmbus_read_word(dev, PMBUS_READ_VOUT, &vcode); if (ret) { printf("VID: failed to read core voltage\n"); return ret; } - /* Scale down to the real mV */ - multiplier = get_pmbus_multiplier(dev); - vout = (int)vcode; - /* Multiplier 1000 (direct mode) requires no change to convert */ - if (multiplier != MV_PER_V) - vout = DIV_ROUND_UP(vout * MV_PER_V, multiplier); + /* + * Decode LINEAR16 via the tree level helper from <pmbus.h>. For + * non Linear VOUT_MODE settings the helper returns 0; fall back + * to the historic mV pass through so existing LSCH boards keep. + */ + ret = vid_read_vout_mode(dev, &vout_mode); + if (ret) + return ret; + if ((vout_mode & PB_VOUT_MODE_MODE_MASK) == PB_VOUT_MODE_LINEAR) { + s64 uv = pmbus_reg2data_linear16(vcode, vout_mode); + + vout = (int)((uv + 500) / 1000); /* round to mV */ + } else { + vout = (int)vcode; + } return vout - board_vdd_drop_compensation(); } #endif @@ -463,11 +465,13 @@ static int set_voltage_to_IR(int i2caddress, int vdd) static int set_voltage_to_pmbus(int i2caddress, int vdd) { int ret, vdd_last, vdd_target = vdd; - int count = MAX_LOOP_WAIT_NEW_VOL, temp = 0, multiplier; + int count = MAX_LOOP_WAIT_NEW_VOL, temp = 0; + u8 vout_mode; + u16 raw; unsigned char value; /* The data to be sent with the PMBus command PAGE_PLUS_WRITE */ - u8 buffer[5] = { 0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND, 0, 0 }; + u8 buffer[5] = { 0x04, PWM_CHANNEL0, PMBUS_VOUT_COMMAND, 0, 0 }; DEVICE_HANDLE_T dev; /* Open device handle */ @@ -475,24 +479,32 @@ static int set_voltage_to_pmbus(int i2caddress, int vdd) if (ret) return ret; - /* Scale up to the proper value for the VOUT command, little endian */ - multiplier = get_pmbus_multiplier(dev); + /* + * Encode target mV as LINEAR16 raw via the tree level helper + * from <pmbus.h>. For non Linear VOUT_MODE settings the helper + * returns 0; fall back to the historic mV pass through. A failed + * VOUT_MODE read aborts: never write a voltage code whose + * encoding could not be determined. + */ vdd += board_vdd_drop_compensation(); - if (multiplier != MV_PER_V) - vdd = DIV_ROUND_UP(vdd * multiplier, MV_PER_V); - buffer[3] = vdd & 0xFF; - buffer[4] = (vdd & 0xFF00) >> 8; + ret = vid_read_vout_mode(dev, &vout_mode); + if (ret) + return ret; + if ((vout_mode & PB_VOUT_MODE_MODE_MASK) == PB_VOUT_MODE_LINEAR) + raw = pmbus_data2reg_linear16((s64)vdd * 1000LL, vout_mode); + else + raw = (u16)vdd; + buffer[3] = raw & 0xFF; + buffer[4] = (raw & 0xFF00) >> 8; /* Check write protect state */ - ret = I2C_READ(dev, PMBUS_CMD_WRITE_PROTECT, (void *)&value, - sizeof(value)); + ret = pmbus_read_byte(dev, PMBUS_WRITE_PROTECT, &value); if (ret) goto exit; if (value != EN_WRITE_ALL_CMD) { value = EN_WRITE_ALL_CMD; - ret = I2C_WRITE(dev, PMBUS_CMD_WRITE_PROTECT, - (void *)&value, sizeof(value)); + ret = pmbus_write_byte(dev, PMBUS_WRITE_PROTECT, value); if (ret) goto exit; } diff --git a/board/nxp/common/vid.h b/board/nxp/common/vid.h index b34c080b4ba..72c1c089aa1 100644 --- a/board/nxp/common/vid.h +++ b/board/nxp/common/vid.h @@ -22,8 +22,9 @@ #define IR_VDD_STEP_UP 5 /* LTC3882 */ -#define PMBUS_CMD_WRITE_PROTECT 0x10 /* + * PMBUS_WRITE_PROTECT (10h) provided by <pmbus.h> + * * WRITE_PROTECT command supported values * 0x80: Disable all writes except WRITE_PROTECT, PAGE, * STORE_USER_ALL and MFR_EE_UNLOCK commands. @@ -51,12 +52,14 @@ #define VDD_MV_MAX 925 #endif -/* PM Bus commands code for LTC3882*/ +/* + * PM Bus commands code for LTC3882. PMBUS_PAGE / PMBUS_READ_VOUT / + * PMBUS_VOUT_MODE / PMBUS_VOUT_COMMAND are provided by <pmbus.h>. + * PMBUS_CMD_PAGE_PLUS_WRITE (05h) is the LTC3882 SMBus block write + * transaction not in <pmbus.h>'s standard subset, so keep its + * definition here. + */ #define PWM_CHANNEL0 0x0 -#define PMBUS_CMD_PAGE 0x0 -#define PMBUS_CMD_READ_VOUT 0x8B -#define PMBUS_CMD_VOUT_MODE 0x20 -#define PMBUS_CMD_VOUT_COMMAND 0x21 #define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 #if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS) || \ diff --git a/board/nxp/imx8mm_evk/imx8mm_evk.env b/board/nxp/imx8mm_evk/imx8mm_evk.env index d59bd6fd5ed..88eefaa35e5 100644 --- a/board/nxp/imx8mm_evk/imx8mm_evk.env +++ b/board/nxp/imx8mm_evk/imx8mm_evk.env @@ -12,6 +12,8 @@ initrd_addr=0x48080000 image=Image ip_dyn=yes kernel_addr_r=0x42000000 +kernel_comp_addr_r=0x60000000 +kernel_comp_size=0x2000000 loadaddr=CONFIG_SYS_LOAD_ADDR mmcautodetect=yes mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX diff --git a/board/nxp/imx8mn_evk/imx8mn_evk.env b/board/nxp/imx8mn_evk/imx8mn_evk.env index cffa83bf792..fbdf202c573 100644 --- a/board/nxp/imx8mn_evk/imx8mn_evk.env +++ b/board/nxp/imx8mn_evk/imx8mn_evk.env @@ -12,6 +12,8 @@ initrd_addr=0x48080000 image=Image ip_dyn=yes kernel_addr_r=0x42000000 +kernel_comp_addr_r=0x60000000 +kernel_comp_size=0x2000000 loadaddr=CONFIG_SYS_LOAD_ADDR mmcautodetect=yes mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX diff --git a/board/nxp/imx8mp_evk/imx8mp_evk.env b/board/nxp/imx8mp_evk/imx8mp_evk.env index e994b93b168..dfc922e6215 100644 --- a/board/nxp/imx8mp_evk/imx8mp_evk.env +++ b/board/nxp/imx8mp_evk/imx8mp_evk.env @@ -10,6 +10,8 @@ fdt_addr=0x43000000 fdtfile=DEFAULT_FDT_FILE image=Image ip_dyn=yes +kernel_comp_addr_r=0x80000000 +kernel_comp_size=0x2000000 mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX mmcpart=1 mmcroot=/dev/mmcblk1p2 rootwait rw diff --git a/board/nxp/imx8mp_evk/spl.c b/board/nxp/imx8mp_evk/spl.c index 27cd82e745a..cd7d79b382d 100644 --- a/board/nxp/imx8mp_evk/spl.c +++ b/board/nxp/imx8mp_evk/spl.c @@ -65,7 +65,7 @@ int power_init_board(void) * Enable DVS control through PMIC_STBY_REQ and * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) */ - if (CONFIG_IS_ENABLED(IMX8M_VDD_SOC_850MV)) + if (IS_ENABLED(CONFIG_IMX8M_VDD_SOC_850MV)) pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14); else pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C); diff --git a/board/nxp/imx8mq_evk/imx8mq_evk.env b/board/nxp/imx8mq_evk/imx8mq_evk.env index 6575dd7cb07..dd674afac91 100644 --- a/board/nxp/imx8mq_evk/imx8mq_evk.env +++ b/board/nxp/imx8mq_evk/imx8mq_evk.env @@ -10,6 +10,8 @@ initrd_addr=0x43800000 image=Image ip_dyn=yes kernel_addr_r=CONFIG_SYS_LOAD_ADDR +kernel_comp_addr_r=0x80000000 +kernel_comp_size=0x2000000 loadaddr=CONFIG_SYS_LOAD_ADDR mmcautodetect=yes mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX diff --git a/board/nxp/imx93_evk/imx93_evk.env b/board/nxp/imx93_evk/imx93_evk.env index b2ed1901a2b..76fadc00eeb 100644 --- a/board/nxp/imx93_evk/imx93_evk.env +++ b/board/nxp/imx93_evk/imx93_evk.env @@ -10,13 +10,16 @@ fdt_addr_r=0x83000000 fdt_addr=0x83000000 fdtfile=DEFAULT_FDT_FILE image=Image +ip_dyn=yes +kernel_addr_r=CONFIG_SYS_LOAD_ADDR +kernel_comp_addr_r=0xC0000000 +kernel_comp_size=0x2000000 mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX mmcpart=1 mmcroot=/dev/mmcblk1p2 rootwait rw mmcautodetect=yes mmcargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot} prepare_mcore=setenv mcore_clk clk-imx93.mcore_booted -kernel_addr_r=CONFIG_SYS_LOAD_ADDR loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file} diff --git a/board/nxp/imx93_frdm/Makefile b/board/nxp/imx93_frdm/Makefile index 9612b1fa55b..751ebfc9458 100644 --- a/board/nxp/imx93_frdm/Makefile +++ b/board/nxp/imx93_frdm/Makefile @@ -7,5 +7,5 @@ obj-y += imx93_frdm.o ifdef CONFIG_XPL_BUILD -obj-y += spl.o lpddr4x_1gb_timing.o lpddr4x_2gb_timing.o +obj-y += spl.o lpddr4x_1gb_timing.o lpddr4x_1cs_2gb_timing.o lpddr4x_2cs_2gb_timing.o endif diff --git a/board/nxp/imx93_frdm/imx93_frdm.env b/board/nxp/imx93_frdm/imx93_frdm.env index 9af3bdfd714..96096bc51a0 100644 --- a/board/nxp/imx93_frdm/imx93_frdm.env +++ b/board/nxp/imx93_frdm/imx93_frdm.env @@ -10,12 +10,15 @@ fdt_addr_r=0x83000000 fdt_addr=0x83000000 fdtfile=DEFAULT_FDT_FILE image=Image +ip_dyn=yes +kernel_addr_r=CONFIG_SYS_LOAD_ADDR +kernel_comp_addr_r=0xC0000000 +kernel_comp_size=0x2000000 mmcdev=1 mmcpart=1 mmcroot=/dev/mmcblk${mmcdev}p2 rootwait rw mmcautodetect=yes mmcargs=setenv bootargs console=${console} root=${mmcroot} -kernel_addr_r=CONFIG_SYS_LOAD_ADDR loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} boot_os=booti ${loadaddr} - ${fdt_addr_r} diff --git a/board/nxp/imx93_frdm/lpddr4_timing.h b/board/nxp/imx93_frdm/lpddr4_timing.h index 192bc9e1519..3ff50d8519b 100644 --- a/board/nxp/imx93_frdm/lpddr4_timing.h +++ b/board/nxp/imx93_frdm/lpddr4_timing.h @@ -7,6 +7,7 @@ #define __LPDDR4_TIMING_H__ extern struct dram_timing_info dram_timing_1GB; -extern struct dram_timing_info dram_timing_2GB; +extern struct dram_timing_info dram_timing_1CS_2GB; +extern struct dram_timing_info dram_timing_2CS_2GB; #endif /* __LPDDR4_TIMING_H__ */ diff --git a/board/nxp/imx93_frdm/lpddr4x_2gb_timing.c b/board/nxp/imx93_frdm/lpddr4x_1cs_2gb_timing.c index cd129e12959..5439a039c3d 100644 --- a/board/nxp/imx93_frdm/lpddr4x_2gb_timing.c +++ b/board/nxp/imx93_frdm/lpddr4x_1cs_2gb_timing.c @@ -1978,7 +1978,7 @@ static struct dram_fsp_msg ddr_dram_fsp_msg[] = { }; /* ddr timing config params */ -struct dram_timing_info dram_timing_2GB = { +struct dram_timing_info dram_timing_1CS_2GB = { .ddrc_cfg = ddr_ddrc_cfg, .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), .ddrphy_cfg = ddr_ddrphy_cfg, diff --git a/board/nxp/imx93_frdm/lpddr4x_2cs_2gb_timing.c b/board/nxp/imx93_frdm/lpddr4x_2cs_2gb_timing.c new file mode 100644 index 00000000000..79539941412 --- /dev/null +++ b/board/nxp/imx93_frdm/lpddr4x_2cs_2gb_timing.c @@ -0,0 +1,2006 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2025 NXP + * + * Generated code from DDR Gear + * + */ + +#include <linux/kernel.h> +#include <asm/arch/ddr.h> + +static struct dram_cfg_param ddr_ddrc_cfg[] = { + /** Initialize DDRC registers **/ + { 0x4e300110, 0x44104001 }, + { 0x4e301000, 0x0 }, + { 0x4e300000, 0x8000ff }, + { 0x4e300008, 0x0 }, + { 0x4e300080, 0x80000412 }, + { 0x4e300084, 0x80000412 }, + { 0x4e300114, 0x1002 }, + { 0x4e300260, 0x80 }, + { 0x4e30017c, 0x0 }, + { 0x4e300f04, 0x80 }, + { 0x4e300800, 0x43b30002 }, + { 0x4e300804, 0x1f1f1f1f }, + { 0x4e301240, 0x0 }, + { 0x4e301244, 0x0 }, + { 0x4e301248, 0x0 }, + { 0x4e30124c, 0x0 }, + { 0x4e301250, 0x0 }, + { 0x4e301254, 0x0 }, + { 0x4e301258, 0x0 }, + { 0x4e30125c, 0x0 }, +}; + +/* dram fsp cfg */ +static struct dram_fsp_cfg ddr_dram_fsp_cfg[] = { + { + { + { 0x4e300100, 0x24a0321b }, + { 0x4e300104, 0xfaee001b }, + { 0x4e300108, 0x2f2e3233 }, + { 0x4e30010c, 0x5c18b }, + { 0x4e300124, 0x1c790000 }, + { 0x4e300160, 0x9102 }, + { 0x4e30016c, 0x35f00000 }, + { 0x4e300170, 0x8b0b0608 }, + { 0x4e300250, 0x28 }, + { 0x4e300254, 0xfe00fe }, + { 0x4e300258, 0x8 }, + { 0x4e30025c, 0x400 }, + { 0x4e300300, 0x224f2213 }, + { 0x4e300304, 0xfe2213 }, + { 0x4e300308, 0xa380e3c }, + }, + { + { 0x01, 0xe4 }, + { 0x02, 0x36 }, + { 0x03, 0x32 }, + { 0x0b, 0x26 }, + { 0x0c, 0x11 }, + { 0x0e, 0x11 }, + { 0x16, 0x04 }, + }, + 0, + }, + { + { + { 0x4e300100, 0x124f2100 }, + { 0x4e300104, 0xf877000e }, + { 0x4e300108, 0x1816e4aa }, + { 0x4e30010c, 0x5101e6 }, + { 0x4e300124, 0xe3c0000 }, + { 0x4e300160, 0x9102 }, + { 0x4e30016c, 0x30900000 }, + { 0x4e300170, 0x8a0a0508 }, + { 0x4e300250, 0x14 }, + { 0x4e300254, 0x7b007b }, + { 0x4e300258, 0x8 }, + { 0x4e30025c, 0x400 }, + }, + { + { 0x01, 0xb4 }, + { 0x02, 0x1b }, + { 0x03, 0x32 }, + { 0x0b, 0x26 }, + { 0x0c, 0x11 }, + { 0x0e, 0x11 }, + { 0x16, 0x04 }, + }, + 0, + }, + { + { + { 0x4e300100, 0x51000 }, + { 0x4e300104, 0xf855000a }, + { 0x4e300108, 0x6e620a48 }, + { 0x4e30010c, 0x31010d }, + { 0x4e300124, 0x4c50000 }, + { 0x4e300160, 0x9102 }, + { 0x4e30016c, 0x30000000 }, + { 0x4e300170, 0x89090408 }, + { 0x4e300250, 0x7 }, + { 0x4e300254, 0x240024 }, + { 0x4e300258, 0x8 }, + { 0x4e30025c, 0x400 }, + }, + { + { 0x01, 0x94 }, + { 0x02, 0x09 }, + { 0x03, 0x32 }, + { 0x0b, 0x26 }, + { 0x0c, 0x11 }, + { 0x0e, 0x11 }, + { 0x16, 0x04 }, + }, + 1, + }, +}; + +/* Auto Generated by SNPS PHY Init code + * which inlcude PHYINIT, 1D/2D message block + * rerention CSR, PIE + */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { +/* ADDR mapping is from ds file. */ + { 0x100a0, 0x4 }, + { 0x100a1, 0x5 }, + { 0x100a2, 0x6 }, + { 0x100a3, 0x7 }, + { 0x100a4, 0x0 }, + { 0x100a5, 0x1 }, + { 0x100a6, 0x2 }, + { 0x100a7, 0x3 }, + { 0x110a0, 0x3 }, + { 0x110a1, 0x2 }, + { 0x110a2, 0x0 }, + { 0x110a3, 0x1 }, + { 0x110a4, 0x7 }, + { 0x110a5, 0x6 }, + { 0x110a6, 0x4 }, + { 0x110a7, 0x5 }, +/* End of ADDR mapping. */ + { 0x1005f, 0x5ff}, + { 0x1015f, 0x5ff}, + { 0x1105f, 0x5ff}, + { 0x1115f, 0x5ff}, + { 0x11005f, 0x5ff}, + { 0x11015f, 0x5ff}, + { 0x11105f, 0x5ff}, + { 0x11115f, 0x5ff}, + { 0x21005f, 0x5ff}, + { 0x21015f, 0x5ff}, + { 0x21105f, 0x5ff}, + { 0x21115f, 0x5ff}, + { 0x55, 0x1ff}, + { 0x1055, 0x1ff}, + { 0x2055, 0x1ff}, + { 0x200c5, 0x19}, + { 0x1200c5, 0xb}, + { 0x2200c5, 0x7}, + { 0x2002e, 0x2}, + { 0x12002e, 0x2}, + { 0x22002e, 0x2}, + { 0x90204, 0x0}, + { 0x190204, 0x0}, + { 0x290204, 0x0}, + { 0x20024, 0x1e3}, + { 0x2003a, 0x2}, + { 0x2007d, 0x212}, + { 0x2007c, 0x61}, + { 0x120024, 0x1e3}, + { 0x2003a, 0x2}, + { 0x12007d, 0x212}, + { 0x12007c, 0x61}, + { 0x220024, 0x1e3}, + { 0x2003a, 0x2}, + { 0x22007d, 0x212}, + { 0x22007c, 0x61}, + { 0x20056, 0x3}, + { 0x120056, 0x3}, + { 0x220056, 0x3}, + { 0x1004d, 0x600}, + { 0x1014d, 0x600}, + { 0x1104d, 0x600}, + { 0x1114d, 0x600}, + { 0x11004d, 0x600}, + { 0x11014d, 0x600}, + { 0x11104d, 0x600}, + { 0x11114d, 0x600}, + { 0x21004d, 0x600}, + { 0x21014d, 0x600}, + { 0x21104d, 0x600}, + { 0x21114d, 0x600}, + { 0x10049, 0xe00}, + { 0x10149, 0xe00}, + { 0x11049, 0xe00}, + { 0x11149, 0xe00}, + { 0x110049, 0xe00}, + { 0x110149, 0xe00}, + { 0x111049, 0xe00}, + { 0x111149, 0xe00}, + { 0x210049, 0xe00}, + { 0x210149, 0xe00}, + { 0x211049, 0xe00}, + { 0x211149, 0xe00}, + { 0x43, 0x60}, + { 0x1043, 0x60}, + { 0x2043, 0x60}, + { 0x20018, 0x1}, + { 0x20075, 0x4}, + { 0x20050, 0x0}, + { 0x2009b, 0x2}, + { 0x20008, 0x3a5}, + { 0x120008, 0x1d3}, + { 0x220008, 0x9c}, + { 0x20088, 0x9}, + { 0x200b2, 0x10c}, + { 0x10043, 0x5a1}, + { 0x10143, 0x5a1}, + { 0x11043, 0x5a1}, + { 0x11143, 0x5a1}, + { 0x1200b2, 0x10c}, + { 0x110043, 0x5a1}, + { 0x110143, 0x5a1}, + { 0x111043, 0x5a1}, + { 0x111143, 0x5a1}, + { 0x2200b2, 0x10c}, + { 0x210043, 0x5a1}, + { 0x210143, 0x5a1}, + { 0x211043, 0x5a1}, + { 0x211143, 0x5a1}, + { 0x200fa, 0x2}, + { 0x1200fa, 0x2}, + { 0x2200fa, 0x2}, + { 0x20019, 0x1}, + { 0x120019, 0x1}, + { 0x220019, 0x1}, + { 0x200f0, 0x600}, + { 0x200f1, 0x0}, + { 0x200f2, 0x4444}, + { 0x200f3, 0x8888}, + { 0x200f4, 0x5655}, + { 0x200f5, 0x0}, + { 0x200f6, 0x0}, + { 0x200f7, 0xf000}, + { 0x1004a, 0x500}, + { 0x1104a, 0x500}, + { 0x20025, 0x0}, + { 0x2002d, 0x0}, + { 0x12002d, 0x0}, + { 0x22002d, 0x0}, + { 0x2002c, 0x0}, + /* workaround STAR_3141216 marker */ + { 0x20021, 0x0}, + /* workaround STAR_3975199 marker */ + { 0x200c7, 0x21}, + /* workaround STAR_3975199 marker */ + { 0x200ca, 0x24}, + /* workaround STAR_3975199 marker */ + { 0x1200c7, 0x21}, + /* workaround STAR_3975199 marker */ + { 0x1200ca, 0x24}, +}; + +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { + { 0x1005f, 0x0}, + { 0x1015f, 0x0}, + { 0x1105f, 0x0}, + { 0x1115f, 0x0}, + { 0x11005f, 0x0}, + { 0x11015f, 0x0}, + { 0x11105f, 0x0}, + { 0x11115f, 0x0}, + { 0x21005f, 0x0}, + { 0x21015f, 0x0}, + { 0x21105f, 0x0}, + { 0x21115f, 0x0}, + { 0x55, 0x0}, + { 0x1055, 0x0}, + { 0x2055, 0x0}, + { 0x200c5, 0x0}, + { 0x1200c5, 0x0}, + { 0x2200c5, 0x0}, + { 0x2002e, 0x0}, + { 0x12002e, 0x0}, + { 0x22002e, 0x0}, + { 0x90204, 0x0}, + { 0x190204, 0x0}, + { 0x290204, 0x0}, + { 0x20024, 0x0}, + { 0x2003a, 0x0}, + { 0x2007d, 0x0}, + { 0x2007c, 0x0}, + { 0x120024, 0x0}, + { 0x12007d, 0x0}, + { 0x12007c, 0x0}, + { 0x220024, 0x0}, + { 0x22007d, 0x0}, + { 0x22007c, 0x0}, + { 0x20056, 0x0}, + { 0x120056, 0x0}, + { 0x220056, 0x0}, + { 0x1004d, 0x0}, + { 0x1014d, 0x0}, + { 0x1104d, 0x0}, + { 0x1114d, 0x0}, + { 0x11004d, 0x0}, + { 0x11014d, 0x0}, + { 0x11104d, 0x0}, + { 0x11114d, 0x0}, + { 0x21004d, 0x0}, + { 0x21014d, 0x0}, + { 0x21104d, 0x0}, + { 0x21114d, 0x0}, + { 0x10049, 0x0}, + { 0x10149, 0x0}, + { 0x11049, 0x0}, + { 0x11149, 0x0}, + { 0x110049, 0x0}, + { 0x110149, 0x0}, + { 0x111049, 0x0}, + { 0x111149, 0x0}, + { 0x210049, 0x0}, + { 0x210149, 0x0}, + { 0x211049, 0x0}, + { 0x211149, 0x0}, + { 0x43, 0x0}, + { 0x1043, 0x0}, + { 0x2043, 0x0}, + { 0x20018, 0x0}, + { 0x20075, 0x0}, + { 0x20050, 0x0}, + { 0x2009b, 0x0}, + { 0x20008, 0x0}, + { 0x120008, 0x0}, + { 0x220008, 0x0}, + { 0x20088, 0x0}, + { 0x200b2, 0x0}, + { 0x10043, 0x0}, + { 0x10143, 0x0}, + { 0x11043, 0x0}, + { 0x11143, 0x0}, + { 0x1200b2, 0x0}, + { 0x110043, 0x0}, + { 0x110143, 0x0}, + { 0x111043, 0x0}, + { 0x111143, 0x0}, + { 0x2200b2, 0x0}, + { 0x210043, 0x0}, + { 0x210143, 0x0}, + { 0x211043, 0x0}, + { 0x211143, 0x0}, + { 0x200fa, 0x0}, + { 0x1200fa, 0x0}, + { 0x2200fa, 0x0}, + { 0x20019, 0x0}, + { 0x120019, 0x0}, + { 0x220019, 0x0}, + { 0x200f0, 0x0}, + { 0x200f1, 0x0}, + { 0x200f2, 0x0}, + { 0x200f3, 0x0}, + { 0x200f4, 0x0}, + { 0x200f5, 0x0}, + { 0x200f6, 0x0}, + { 0x200f7, 0x0}, + { 0x1004a, 0x0}, + { 0x1104a, 0x0}, + { 0x20025, 0x0}, + { 0x2002d, 0x0}, + { 0x12002d, 0x0}, + { 0x22002d, 0x0}, + { 0x2002c, 0x0}, + { 0xd0000, 0x0}, + { 0x90000, 0x0}, + { 0x90001, 0x0}, + { 0x90002, 0x0}, + { 0x90003, 0x0}, + { 0x90004, 0x0}, + { 0x90005, 0x0}, + { 0x90029, 0x0}, + { 0x9002a, 0x0}, + { 0x9002b, 0x0}, + { 0x9002c, 0x0}, + { 0x9002d, 0x0}, + { 0x9002e, 0x0}, + { 0x9002f, 0x0}, + { 0x90030, 0x0}, + { 0x90031, 0x0}, + { 0x90032, 0x0}, + { 0x90033, 0x0}, + { 0x90034, 0x0}, + { 0x90035, 0x0}, + { 0x90036, 0x0}, + { 0x90037, 0x0}, + { 0x90038, 0x0}, + { 0x90039, 0x0}, + { 0x9003a, 0x0}, + { 0x9003b, 0x0}, + { 0x9003c, 0x0}, + { 0x9003d, 0x0}, + { 0x9003e, 0x0}, + { 0x9003f, 0x0}, + { 0x90040, 0x0}, + { 0x90041, 0x0}, + { 0x90042, 0x0}, + { 0x90043, 0x0}, + { 0x90044, 0x0}, + { 0x90045, 0x0}, + { 0x90046, 0x0}, + { 0x90047, 0x0}, + { 0x90048, 0x0}, + { 0x90049, 0x0}, + { 0x9004a, 0x0}, + { 0x9004b, 0x0}, + { 0x9004c, 0x0}, + { 0x9004d, 0x0}, + { 0x9004e, 0x0}, + { 0x9004f, 0x0}, + { 0x90050, 0x0}, + { 0x90051, 0x0}, + { 0x90052, 0x0}, + { 0x90053, 0x0}, + { 0x90054, 0x0}, + { 0x90055, 0x0}, + { 0x90056, 0x0}, + { 0x90057, 0x0}, + { 0x90058, 0x0}, + { 0x90059, 0x0}, + { 0x9005a, 0x0}, + { 0x9005b, 0x0}, + { 0x9005c, 0x0}, + { 0x9005d, 0x0}, + { 0x9005e, 0x0}, + { 0x9005f, 0x0}, + { 0x90060, 0x0}, + { 0x90061, 0x0}, + { 0x90062, 0x0}, + { 0x90063, 0x0}, + { 0x90064, 0x0}, + { 0x90065, 0x0}, + { 0x90066, 0x0}, + { 0x90067, 0x0}, + { 0x90068, 0x0}, + { 0x90069, 0x0}, + { 0x9006a, 0x0}, + { 0x9006b, 0x0}, + { 0x9006c, 0x0}, + { 0x9006d, 0x0}, + { 0x9006e, 0x0}, + { 0x9006f, 0x0}, + { 0x90070, 0x0}, + { 0x90071, 0x0}, + { 0x90072, 0x0}, + { 0x90073, 0x0}, + { 0x90074, 0x0}, + { 0x90075, 0x0}, + { 0x90076, 0x0}, + { 0x90077, 0x0}, + { 0x90078, 0x0}, + { 0x90079, 0x0}, + { 0x9007a, 0x0}, + { 0x9007b, 0x0}, + { 0x9007c, 0x0}, + { 0x9007d, 0x0}, + { 0x9007e, 0x0}, + { 0x9007f, 0x0}, + { 0x90080, 0x0}, + { 0x90081, 0x0}, + { 0x90082, 0x0}, + { 0x90083, 0x0}, + { 0x90084, 0x0}, + { 0x90085, 0x0}, + { 0x90086, 0x0}, + { 0x90087, 0x0}, + { 0x90088, 0x0}, + { 0x90089, 0x0}, + { 0x9008a, 0x0}, + { 0x9008b, 0x0}, + { 0x9008c, 0x0}, + { 0x9008d, 0x0}, + { 0x9008e, 0x0}, + { 0x9008f, 0x0}, + { 0x90090, 0x0}, + { 0x90091, 0x0}, + { 0x90092, 0x0}, + { 0x90093, 0x0}, + { 0x90094, 0x0}, + { 0x90095, 0x0}, + { 0x90096, 0x0}, + { 0x90097, 0x0}, + { 0x90098, 0x0}, + { 0x90099, 0x0}, + { 0x9009a, 0x0}, + { 0x9009b, 0x0}, + { 0x9009c, 0x0}, + { 0x9009d, 0x0}, + { 0x9009e, 0x0}, + { 0x9009f, 0x0}, + { 0x900a0, 0x0}, + { 0x900a1, 0x0}, + { 0x900a2, 0x0}, + { 0x900a3, 0x0}, + { 0x900a4, 0x0}, + { 0x900a5, 0x0}, + { 0x900a6, 0x0}, + { 0x900a7, 0x0}, + { 0x900a8, 0x0}, + { 0x900a9, 0x0}, + { 0x40000, 0x0}, + { 0x40020, 0x0}, + { 0x40040, 0x0}, + { 0x40060, 0x0}, + { 0x40001, 0x0}, + { 0x40021, 0x0}, + { 0x40041, 0x0}, + { 0x40061, 0x0}, + { 0x40002, 0x0}, + { 0x40022, 0x0}, + { 0x40042, 0x0}, + { 0x40062, 0x0}, + { 0x40003, 0x0}, + { 0x40023, 0x0}, + { 0x40043, 0x0}, + { 0x40063, 0x0}, + { 0x40004, 0x0}, + { 0x40024, 0x0}, + { 0x40044, 0x0}, + { 0x40064, 0x0}, + { 0x40005, 0x0}, + { 0x40025, 0x0}, + { 0x40045, 0x0}, + { 0x40065, 0x0}, + { 0x40006, 0x0}, + { 0x40026, 0x0}, + { 0x40046, 0x0}, + { 0x40066, 0x0}, + { 0x40007, 0x0}, + { 0x40027, 0x0}, + { 0x40047, 0x0}, + { 0x40067, 0x0}, + { 0x40008, 0x0}, + { 0x40028, 0x0}, + { 0x40048, 0x0}, + { 0x40068, 0x0}, + { 0x40009, 0x0}, + { 0x40029, 0x0}, + { 0x40049, 0x0}, + { 0x40069, 0x0}, + { 0x4000a, 0x0}, + { 0x4002a, 0x0}, + { 0x4004a, 0x0}, + { 0x4006a, 0x0}, + { 0x4000b, 0x0}, + { 0x4002b, 0x0}, + { 0x4004b, 0x0}, + { 0x4006b, 0x0}, + { 0x4000c, 0x0}, + { 0x4002c, 0x0}, + { 0x4004c, 0x0}, + { 0x4006c, 0x0}, + { 0x4000d, 0x0}, + { 0x4002d, 0x0}, + { 0x4004d, 0x0}, + { 0x4006d, 0x0}, + { 0x4000e, 0x0}, + { 0x4002e, 0x0}, + { 0x4004e, 0x0}, + { 0x4006e, 0x0}, + { 0x4000f, 0x0}, + { 0x4002f, 0x0}, + { 0x4004f, 0x0}, + { 0x4006f, 0x0}, + { 0x40010, 0x0}, + { 0x40030, 0x0}, + { 0x40050, 0x0}, + { 0x40070, 0x0}, + { 0x40011, 0x0}, + { 0x40031, 0x0}, + { 0x40051, 0x0}, + { 0x40071, 0x0}, + { 0x40012, 0x0}, + { 0x40032, 0x0}, + { 0x40052, 0x0}, + { 0x40072, 0x0}, + { 0x40013, 0x0}, + { 0x40033, 0x0}, + { 0x40053, 0x0}, + { 0x40073, 0x0}, + { 0x40014, 0x0}, + { 0x40034, 0x0}, + { 0x40054, 0x0}, + { 0x40074, 0x0}, + { 0x40015, 0x0}, + { 0x40035, 0x0}, + { 0x40055, 0x0}, + { 0x40075, 0x0}, + { 0x40016, 0x0}, + { 0x40036, 0x0}, + { 0x40056, 0x0}, + { 0x40076, 0x0}, + { 0x40017, 0x0}, + { 0x40037, 0x0}, + { 0x40057, 0x0}, + { 0x40077, 0x0}, + { 0x40018, 0x0}, + { 0x40038, 0x0}, + { 0x40058, 0x0}, + { 0x40078, 0x0}, + { 0x40019, 0x0}, + { 0x40039, 0x0}, + { 0x40059, 0x0}, + { 0x40079, 0x0}, + { 0x4001a, 0x0}, + { 0x4003a, 0x0}, + { 0x4005a, 0x0}, + { 0x4007a, 0x0}, + { 0x900aa, 0x0}, + { 0x900ab, 0x0}, + { 0x900ac, 0x0}, + { 0x900ad, 0x0}, + { 0x900ae, 0x0}, + { 0x900af, 0x0}, + { 0x900b0, 0x0}, + { 0x900b1, 0x0}, + { 0x900b2, 0x0}, + { 0x900b3, 0x0}, + { 0x900b4, 0x0}, + { 0x900b5, 0x0}, + { 0x900b6, 0x0}, + { 0x900b7, 0x0}, + { 0x900b8, 0x0}, + { 0x900b9, 0x0}, + { 0x900ba, 0x0}, + { 0x900bb, 0x0}, + { 0x900bc, 0x0}, + { 0x900bd, 0x0}, + { 0x900be, 0x0}, + { 0x900bf, 0x0}, + { 0x900c0, 0x0}, + { 0x900c1, 0x0}, + { 0x900c2, 0x0}, + { 0x900c3, 0x0}, + { 0x900c4, 0x0}, + { 0x900c5, 0x0}, + { 0x900c6, 0x0}, + { 0x900c7, 0x0}, + { 0x900c8, 0x0}, + { 0x900c9, 0x0}, + { 0x900ca, 0x0}, + { 0x900cb, 0x0}, + { 0x900cc, 0x0}, + { 0x900cd, 0x0}, + { 0x900ce, 0x0}, + { 0x900cf, 0x0}, + { 0x900d0, 0x0}, + { 0x900d1, 0x0}, + { 0x900d2, 0x0}, + { 0x900d3, 0x0}, + { 0x900d4, 0x0}, + { 0x900d5, 0x0}, + { 0x900d6, 0x0}, + { 0x900d7, 0x0}, + { 0x900d8, 0x0}, + { 0x900d9, 0x0}, + { 0x900da, 0x0}, + { 0x900db, 0x0}, + { 0x900dc, 0x0}, + { 0x900dd, 0x0}, + { 0x900de, 0x0}, + { 0x900df, 0x0}, + { 0x900e0, 0x0}, + { 0x900e1, 0x0}, + { 0x900e2, 0x0}, + { 0x900e3, 0x0}, + { 0x900e4, 0x0}, + { 0x900e5, 0x0}, + { 0x900e6, 0x0}, + { 0x900e7, 0x0}, + { 0x900e8, 0x0}, + { 0x900e9, 0x0}, + { 0x900ea, 0x0}, + { 0x900eb, 0x0}, + { 0x900ec, 0x0}, + { 0x900ed, 0x0}, + { 0x900ee, 0x0}, + { 0x900ef, 0x0}, + { 0x900f0, 0x0}, + { 0x900f1, 0x0}, + { 0x900f2, 0x0}, + { 0x900f3, 0x0}, + { 0x900f4, 0x0}, + { 0x900f5, 0x0}, + { 0x900f6, 0x0}, + { 0x900f7, 0x0}, + { 0x900f8, 0x0}, + { 0x900f9, 0x0}, + { 0x900fa, 0x0}, + { 0x900fb, 0x0}, + { 0x900fc, 0x0}, + { 0x900fd, 0x0}, + { 0x900fe, 0x0}, + { 0x900ff, 0x0}, + { 0x90100, 0x0}, + { 0x90101, 0x0}, + { 0x90102, 0x0}, + { 0x90103, 0x0}, + { 0x90104, 0x0}, + { 0x90105, 0x0}, + { 0x90106, 0x0}, + { 0x90107, 0x0}, + { 0x90108, 0x0}, + { 0x90109, 0x0}, + { 0x9010a, 0x0}, + { 0x9010b, 0x0}, + { 0x9010c, 0x0}, + { 0x9010d, 0x0}, + { 0x9010e, 0x0}, + { 0x9010f, 0x0}, + { 0x90110, 0x0}, + { 0x90111, 0x0}, + { 0x90112, 0x0}, + { 0x90113, 0x0}, + { 0x90114, 0x0}, + { 0x90115, 0x0}, + { 0x90116, 0x0}, + { 0x90117, 0x0}, + { 0x90118, 0x0}, + { 0x90119, 0x0}, + { 0x9011a, 0x0}, + { 0x9011b, 0x0}, + { 0x9011c, 0x0}, + { 0x9011d, 0x0}, + { 0x9011e, 0x0}, + { 0x9011f, 0x0}, + { 0x90120, 0x0}, + { 0x90121, 0x0}, + { 0x90122, 0x0}, + { 0x90123, 0x0}, + { 0x90124, 0x0}, + { 0x90125, 0x0}, + { 0x90126, 0x0}, + { 0x90127, 0x0}, + { 0x90128, 0x0}, + { 0x90129, 0x0}, + { 0x9012a, 0x0}, + { 0x9012b, 0x0}, + { 0x9012c, 0x0}, + { 0x9012d, 0x0}, + { 0x9012e, 0x0}, + { 0x9012f, 0x0}, + { 0x90130, 0x0}, + { 0x90131, 0x0}, + { 0x90132, 0x0}, + { 0x90133, 0x0}, + { 0x90134, 0x0}, + { 0x90135, 0x0}, + { 0x90136, 0x0}, + { 0x90137, 0x0}, + { 0x90138, 0x0}, + { 0x90139, 0x0}, + { 0x9013a, 0x0}, + { 0x9013b, 0x0}, + { 0x9013c, 0x0}, + { 0x9013d, 0x0}, + { 0x9013e, 0x0}, + { 0x9013f, 0x0}, + { 0x90140, 0x0}, + { 0x90141, 0x0}, + { 0x90142, 0x0}, + { 0x90143, 0x0}, + { 0x90144, 0x0}, + { 0x90145, 0x0}, + { 0x90146, 0x0}, + { 0x90147, 0x0}, + { 0x90148, 0x0}, + { 0x90149, 0x0}, + { 0x9014a, 0x0}, + { 0x9014b, 0x0}, + { 0x9014c, 0x0}, + { 0x9014d, 0x0}, + { 0x9014e, 0x0}, + { 0x9014f, 0x0}, + { 0x90150, 0x0}, + { 0x90151, 0x0}, + { 0x90152, 0x0}, + { 0x90153, 0x0}, + { 0x90154, 0x0}, + { 0x90155, 0x0}, + { 0x90156, 0x0}, + { 0x90157, 0x0}, + { 0x90158, 0x0}, + { 0x90159, 0x0}, + { 0x9015a, 0x0}, + { 0x9015b, 0x0}, + { 0x9015c, 0x0}, + { 0x9015d, 0x0}, + { 0x9015e, 0x0}, + { 0x9015f, 0x0}, + { 0x90160, 0x0}, + { 0x90161, 0x0}, + { 0x90162, 0x0}, + { 0x90163, 0x0}, + { 0x90164, 0x0}, + { 0x90165, 0x0}, + { 0x90166, 0x0}, + { 0x90167, 0x0}, + { 0x90168, 0x0}, + { 0x90169, 0x0}, + { 0x9016a, 0x0}, + { 0x9016b, 0x0}, + { 0x9016c, 0x0}, + { 0x9016d, 0x0}, + { 0x9016e, 0x0}, + { 0x9016f, 0x0}, + { 0x90170, 0x0}, + { 0x90171, 0x0}, + { 0x90172, 0x0}, + { 0x90173, 0x0}, + { 0x90174, 0x0}, + { 0x90175, 0x0}, + { 0x90176, 0x0}, + { 0x90177, 0x0}, + { 0x90178, 0x0}, + { 0x90179, 0x0}, + { 0x9017a, 0x0}, + { 0x9017b, 0x0}, + { 0x9017c, 0x0}, + { 0x9017d, 0x0}, + { 0x9017e, 0x0}, + { 0x9017f, 0x0}, + { 0x90180, 0x0}, + { 0x90181, 0x0}, + { 0x90182, 0x0}, + { 0x90183, 0x0}, + { 0x90184, 0x0}, + { 0x90006, 0x0}, + { 0x90007, 0x0}, + { 0x90008, 0x0}, + { 0x90009, 0x0}, + { 0x9000a, 0x0}, + { 0x9000b, 0x0}, + { 0xd00e7, 0x0}, + { 0x90017, 0x0}, + { 0x9001f, 0x0}, + { 0x90026, 0x0}, + { 0x400d0, 0x0}, + { 0x400d1, 0x0}, + { 0x400d2, 0x0}, + { 0x400d3, 0x0}, + { 0x400d4, 0x0}, + { 0x400d5, 0x0}, + { 0x400d6, 0x0}, + { 0x400d7, 0x0}, + { 0x200be, 0x0}, + { 0x2000b, 0x0}, + { 0x2000c, 0x0}, + { 0x2000d, 0x0}, + { 0x2000e, 0x0}, + { 0x12000b, 0x0}, + { 0x12000c, 0x0}, + { 0x12000d, 0x0}, + { 0x12000e, 0x0}, + { 0x22000b, 0x0}, + { 0x22000c, 0x0}, + { 0x22000d, 0x0}, + { 0x22000e, 0x0}, + { 0x9000c, 0x0}, + { 0x9000d, 0x0}, + { 0x9000e, 0x0}, + { 0x9000f, 0x0}, + { 0x90010, 0x0}, + { 0x90011, 0x0}, + { 0x90012, 0x0}, + { 0x90013, 0x0}, + { 0x20010, 0x0}, + { 0x20011, 0x0}, + { 0x120010, 0x0}, + { 0x120011, 0x0}, + { 0x40080, 0x0}, + { 0x40081, 0x0}, + { 0x40082, 0x0}, + { 0x40083, 0x0}, + { 0x40084, 0x0}, + { 0x40085, 0x0}, + { 0x140080, 0x0}, + { 0x140081, 0x0}, + { 0x140082, 0x0}, + { 0x140083, 0x0}, + { 0x140084, 0x0}, + { 0x140085, 0x0}, + { 0x240080, 0x0}, + { 0x240081, 0x0}, + { 0x240082, 0x0}, + { 0x240083, 0x0}, + { 0x240084, 0x0}, + { 0x240085, 0x0}, + { 0x400fd, 0x0}, + { 0x400f1, 0x0}, + { 0x10011, 0x0}, + { 0x10012, 0x0}, + { 0x10013, 0x0}, + { 0x10018, 0x0}, + { 0x10002, 0x0}, + { 0x100b2, 0x0}, + { 0x101b4, 0x0}, + { 0x102b4, 0x0}, + { 0x103b4, 0x0}, + { 0x104b4, 0x0}, + { 0x105b4, 0x0}, + { 0x106b4, 0x0}, + { 0x107b4, 0x0}, + { 0x108b4, 0x0}, + { 0x11011, 0x0}, + { 0x11012, 0x0}, + { 0x11013, 0x0}, + { 0x11018, 0x0}, + { 0x11002, 0x0}, + { 0x110b2, 0x0}, + { 0x111b4, 0x0}, + { 0x112b4, 0x0}, + { 0x113b4, 0x0}, + { 0x114b4, 0x0}, + { 0x115b4, 0x0}, + { 0x116b4, 0x0}, + { 0x117b4, 0x0}, + { 0x118b4, 0x0}, + { 0x20089, 0x0}, + { 0xc0080, 0x0}, + { 0x200cb, 0x0}, + { 0x10068, 0x0}, + { 0x10069, 0x0}, + { 0x10168, 0x0}, + { 0x10169, 0x0}, + { 0x10268, 0x0}, + { 0x10269, 0x0}, + { 0x10368, 0x0}, + { 0x10369, 0x0}, + { 0x10468, 0x0}, + { 0x10469, 0x0}, + { 0x10568, 0x0}, + { 0x10569, 0x0}, + { 0x10668, 0x0}, + { 0x10669, 0x0}, + { 0x10768, 0x0}, + { 0x10769, 0x0}, + { 0x10868, 0x0}, + { 0x10869, 0x0}, + { 0x100aa, 0x0}, + { 0x10062, 0x0}, + { 0x10001, 0x0}, + { 0x100a0, 0x0}, + { 0x100a1, 0x0}, + { 0x100a2, 0x0}, + { 0x100a3, 0x0}, + { 0x100a4, 0x0}, + { 0x100a5, 0x0}, + { 0x100a6, 0x0}, + { 0x100a7, 0x0}, + { 0x11068, 0x0}, + { 0x11069, 0x0}, + { 0x11168, 0x0}, + { 0x11169, 0x0}, + { 0x11268, 0x0}, + { 0x11269, 0x0}, + { 0x11368, 0x0}, + { 0x11369, 0x0}, + { 0x11468, 0x0}, + { 0x11469, 0x0}, + { 0x11568, 0x0}, + { 0x11569, 0x0}, + { 0x11668, 0x0}, + { 0x11669, 0x0}, + { 0x11768, 0x0}, + { 0x11769, 0x0}, + { 0x11868, 0x0}, + { 0x11869, 0x0}, + { 0x110aa, 0x0}, + { 0x11062, 0x0}, + { 0x11001, 0x0}, + { 0x110a0, 0x0}, + { 0x110a1, 0x0}, + { 0x110a2, 0x0}, + { 0x110a3, 0x0}, + { 0x110a4, 0x0}, + { 0x110a5, 0x0}, + { 0x110a6, 0x0}, + { 0x110a7, 0x0}, + { 0x80, 0x0}, + { 0x1080, 0x0}, + { 0x2080, 0x0}, + { 0x10020, 0x0}, + { 0x10080, 0x0}, + { 0x10081, 0x0}, + { 0x100d0, 0x0}, + { 0x100d1, 0x0}, + { 0x1008c, 0x0}, + { 0x1008d, 0x0}, + { 0x10180, 0x0}, + { 0x10181, 0x0}, + { 0x101d0, 0x0}, + { 0x101d1, 0x0}, + { 0x1018c, 0x0}, + { 0x1018d, 0x0}, + { 0x100c0, 0x0}, + { 0x100c1, 0x0}, + { 0x101c0, 0x0}, + { 0x101c1, 0x0}, + { 0x102c0, 0x0}, + { 0x102c1, 0x0}, + { 0x103c0, 0x0}, + { 0x103c1, 0x0}, + { 0x104c0, 0x0}, + { 0x104c1, 0x0}, + { 0x105c0, 0x0}, + { 0x105c1, 0x0}, + { 0x106c0, 0x0}, + { 0x106c1, 0x0}, + { 0x107c0, 0x0}, + { 0x107c1, 0x0}, + { 0x108c0, 0x0}, + { 0x108c1, 0x0}, + { 0x100ae, 0x0}, + { 0x100af, 0x0}, + { 0x11020, 0x0}, + { 0x11080, 0x0}, + { 0x11081, 0x0}, + { 0x110d0, 0x0}, + { 0x110d1, 0x0}, + { 0x1108c, 0x0}, + { 0x1108d, 0x0}, + { 0x11180, 0x0}, + { 0x11181, 0x0}, + { 0x111d0, 0x0}, + { 0x111d1, 0x0}, + { 0x1118c, 0x0}, + { 0x1118d, 0x0}, + { 0x110c0, 0x0}, + { 0x110c1, 0x0}, + { 0x111c0, 0x0}, + { 0x111c1, 0x0}, + { 0x112c0, 0x0}, + { 0x112c1, 0x0}, + { 0x113c0, 0x0}, + { 0x113c1, 0x0}, + { 0x114c0, 0x0}, + { 0x114c1, 0x0}, + { 0x115c0, 0x0}, + { 0x115c1, 0x0}, + { 0x116c0, 0x0}, + { 0x116c1, 0x0}, + { 0x117c0, 0x0}, + { 0x117c1, 0x0}, + { 0x118c0, 0x0}, + { 0x118c1, 0x0}, + { 0x110ae, 0x0}, + { 0x110af, 0x0}, + { 0x90201, 0x0}, + { 0x90202, 0x0}, + { 0x90203, 0x0}, + { 0x90205, 0x0}, + { 0x90206, 0x0}, + { 0x90207, 0x0}, + { 0x90208, 0x0}, + { 0x20020, 0x0}, + { 0x100080, 0x0}, + { 0x101080, 0x0}, + { 0x102080, 0x0}, + { 0x110020, 0x0}, + { 0x110080, 0x0}, + { 0x110081, 0x0}, + { 0x1100d0, 0x0}, + { 0x1100d1, 0x0}, + { 0x11008c, 0x0}, + { 0x11008d, 0x0}, + { 0x110180, 0x0}, + { 0x110181, 0x0}, + { 0x1101d0, 0x0}, + { 0x1101d1, 0x0}, + { 0x11018c, 0x0}, + { 0x11018d, 0x0}, + { 0x1100c0, 0x0}, + { 0x1100c1, 0x0}, + { 0x1101c0, 0x0}, + { 0x1101c1, 0x0}, + { 0x1102c0, 0x0}, + { 0x1102c1, 0x0}, + { 0x1103c0, 0x0}, + { 0x1103c1, 0x0}, + { 0x1104c0, 0x0}, + { 0x1104c1, 0x0}, + { 0x1105c0, 0x0}, + { 0x1105c1, 0x0}, + { 0x1106c0, 0x0}, + { 0x1106c1, 0x0}, + { 0x1107c0, 0x0}, + { 0x1107c1, 0x0}, + { 0x1108c0, 0x0}, + { 0x1108c1, 0x0}, + { 0x1100ae, 0x0}, + { 0x1100af, 0x0}, + { 0x111020, 0x0}, + { 0x111080, 0x0}, + { 0x111081, 0x0}, + { 0x1110d0, 0x0}, + { 0x1110d1, 0x0}, + { 0x11108c, 0x0}, + { 0x11108d, 0x0}, + { 0x111180, 0x0}, + { 0x111181, 0x0}, + { 0x1111d0, 0x0}, + { 0x1111d1, 0x0}, + { 0x11118c, 0x0}, + { 0x11118d, 0x0}, + { 0x1110c0, 0x0}, + { 0x1110c1, 0x0}, + { 0x1111c0, 0x0}, + { 0x1111c1, 0x0}, + { 0x1112c0, 0x0}, + { 0x1112c1, 0x0}, + { 0x1113c0, 0x0}, + { 0x1113c1, 0x0}, + { 0x1114c0, 0x0}, + { 0x1114c1, 0x0}, + { 0x1115c0, 0x0}, + { 0x1115c1, 0x0}, + { 0x1116c0, 0x0}, + { 0x1116c1, 0x0}, + { 0x1117c0, 0x0}, + { 0x1117c1, 0x0}, + { 0x1118c0, 0x0}, + { 0x1118c1, 0x0}, + { 0x1110ae, 0x0}, + { 0x1110af, 0x0}, + { 0x190201, 0x0}, + { 0x190202, 0x0}, + { 0x190203, 0x0}, + { 0x190205, 0x0}, + { 0x190206, 0x0}, + { 0x190207, 0x0}, + { 0x190208, 0x0}, + { 0x120020, 0x0}, + { 0x200080, 0x0}, + { 0x201080, 0x0}, + { 0x202080, 0x0}, + { 0x210020, 0x0}, + { 0x210080, 0x0}, + { 0x210081, 0x0}, + { 0x2100d0, 0x0}, + { 0x2100d1, 0x0}, + { 0x21008c, 0x0}, + { 0x21008d, 0x0}, + { 0x210180, 0x0}, + { 0x210181, 0x0}, + { 0x2101d0, 0x0}, + { 0x2101d1, 0x0}, + { 0x21018c, 0x0}, + { 0x21018d, 0x0}, + { 0x2100c0, 0x0}, + { 0x2100c1, 0x0}, + { 0x2101c0, 0x0}, + { 0x2101c1, 0x0}, + { 0x2102c0, 0x0}, + { 0x2102c1, 0x0}, + { 0x2103c0, 0x0}, + { 0x2103c1, 0x0}, + { 0x2104c0, 0x0}, + { 0x2104c1, 0x0}, + { 0x2105c0, 0x0}, + { 0x2105c1, 0x0}, + { 0x2106c0, 0x0}, + { 0x2106c1, 0x0}, + { 0x2107c0, 0x0}, + { 0x2107c1, 0x0}, + { 0x2108c0, 0x0}, + { 0x2108c1, 0x0}, + { 0x2100ae, 0x0}, + { 0x2100af, 0x0}, + { 0x211020, 0x0}, + { 0x211080, 0x0}, + { 0x211081, 0x0}, + { 0x2110d0, 0x0}, + { 0x2110d1, 0x0}, + { 0x21108c, 0x0}, + { 0x21108d, 0x0}, + { 0x211180, 0x0}, + { 0x211181, 0x0}, + { 0x2111d0, 0x0}, + { 0x2111d1, 0x0}, + { 0x21118c, 0x0}, + { 0x21118d, 0x0}, + { 0x2110c0, 0x0}, + { 0x2110c1, 0x0}, + { 0x2111c0, 0x0}, + { 0x2111c1, 0x0}, + { 0x2112c0, 0x0}, + { 0x2112c1, 0x0}, + { 0x2113c0, 0x0}, + { 0x2113c1, 0x0}, + { 0x2114c0, 0x0}, + { 0x2114c1, 0x0}, + { 0x2115c0, 0x0}, + { 0x2115c1, 0x0}, + { 0x2116c0, 0x0}, + { 0x2116c1, 0x0}, + { 0x2117c0, 0x0}, + { 0x2117c1, 0x0}, + { 0x2118c0, 0x0}, + { 0x2118c1, 0x0}, + { 0x2110ae, 0x0}, + { 0x2110af, 0x0}, + { 0x290201, 0x0}, + { 0x290202, 0x0}, + { 0x290203, 0x0}, + { 0x290205, 0x0}, + { 0x290206, 0x0}, + { 0x290207, 0x0}, + { 0x290208, 0x0}, + { 0x220020, 0x0}, + { 0x20077, 0x0}, + { 0x20072, 0x0}, + { 0x20073, 0x0}, + { 0x400c0, 0x0}, + { 0x10040, 0x0}, + { 0x10140, 0x0}, + { 0x10240, 0x0}, + { 0x10340, 0x0}, + { 0x10440, 0x0}, + { 0x10540, 0x0}, + { 0x10640, 0x0}, + { 0x10740, 0x0}, + { 0x10840, 0x0}, + { 0x11040, 0x0}, + { 0x11140, 0x0}, + { 0x11240, 0x0}, + { 0x11340, 0x0}, + { 0x11440, 0x0}, + { 0x11540, 0x0}, + { 0x11640, 0x0}, + { 0x11740, 0x0}, + { 0x11840, 0x0}, +}; + +static struct dram_cfg_param ddr_fsp0_cfg[] = { + { 0xd0000, 0x0}, + { 0x54003, 0xe94}, + { 0x54004, 0x4}, + { 0x54006, 0x15}, + { 0x54008, 0x131f}, + { 0x54009, 0xc8}, + { 0x5400b, 0x4}, + { 0x5400d, 0x100}, + { 0x5400f, 0x100}, + { 0x54012, 0x310}, + { 0x54019, 0x36e4}, + { 0x5401a, 0x32}, + { 0x5401b, 0x1126}, + { 0x5401c, 0x1108}, + { 0x5401e, 0x4}, + { 0x5401f, 0x36e4}, + { 0x54020, 0x32}, + { 0x54021, 0x1126}, + { 0x54022, 0x1108}, + { 0x54024, 0x4}, + { 0x54032, 0xe400}, + { 0x54033, 0x3236}, + { 0x54034, 0x2600}, + { 0x54035, 0x811}, + { 0x54036, 0x11}, + { 0x54037, 0x400}, + { 0x54038, 0xe400}, + { 0x54039, 0x3236}, + { 0x5403a, 0x2600}, + { 0x5403b, 0x811}, + { 0x5403c, 0x11}, + { 0x5403d, 0x400}, + { 0xd0000, 0x1}, +}; + +static struct dram_cfg_param ddr_fsp1_cfg[] = { + { 0xd0000, 0x0}, + { 0x54002, 0x1}, + { 0x54003, 0x74a}, + { 0x54004, 0x4}, + { 0x54006, 0x15}, + { 0x54008, 0x121f}, + { 0x54009, 0xc8}, + { 0x5400b, 0x4}, + { 0x5400d, 0x100}, + { 0x5400f, 0x100}, + { 0x54012, 0x310}, + { 0x54019, 0x1bb4}, + { 0x5401a, 0x32}, + { 0x5401b, 0x1126}, + { 0x5401c, 0x1108}, + { 0x5401e, 0x4}, + { 0x5401f, 0x1bb4}, + { 0x54020, 0x32}, + { 0x54021, 0x1126}, + { 0x54022, 0x1108}, + { 0x54024, 0x4}, + { 0x54032, 0xb400}, + { 0x54033, 0x321b}, + { 0x54034, 0x2600}, + { 0x54035, 0x811}, + { 0x54036, 0x11}, + { 0x54037, 0x400}, + { 0x54038, 0xb400}, + { 0x54039, 0x321b}, + { 0x5403a, 0x2600}, + { 0x5403b, 0x811}, + { 0x5403c, 0x11}, + { 0x5403d, 0x400}, + { 0xd0000, 0x1}, +}; + +static struct dram_cfg_param ddr_fsp2_cfg[] = { + { 0xd0000, 0x0}, + { 0x54002, 0x102}, + { 0x54003, 0x270}, + { 0x54004, 0x4}, + { 0x54006, 0x15}, + { 0x54008, 0x121f}, + { 0x54009, 0xc8}, + { 0x5400b, 0x4}, + { 0x5400d, 0x100}, + { 0x5400f, 0x100}, + { 0x54012, 0x310}, + { 0x54019, 0x994}, + { 0x5401a, 0x32}, + { 0x5401b, 0x1126}, + { 0x5401c, 0x1100}, + { 0x5401e, 0x4}, + { 0x5401f, 0x994}, + { 0x54020, 0x32}, + { 0x54021, 0x1126}, + { 0x54022, 0x1100}, + { 0x54024, 0x4}, + { 0x54032, 0x9400}, + { 0x54033, 0x3209}, + { 0x54034, 0x2600}, + { 0x54035, 0x11}, + { 0x54036, 0x11}, + { 0x54037, 0x400}, + { 0x54038, 0x9400}, + { 0x54039, 0x3209}, + { 0x5403a, 0x2600}, + { 0x5403b, 0x11}, + { 0x5403c, 0x11}, + { 0x5403d, 0x400}, + { 0xd0000, 0x1}, +}; + +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + { 0xd0000, 0x0}, + { 0x54003, 0xe94}, + { 0x54004, 0x4}, + { 0x54006, 0x15}, + { 0x54008, 0x61}, + { 0x54009, 0xc8}, + { 0x5400b, 0x4}, + { 0x5400d, 0x100}, + { 0x5400f, 0x100}, + { 0x54010, 0x2080}, + { 0x54012, 0x310}, + { 0x54019, 0x36e4}, + { 0x5401a, 0x32}, + { 0x5401b, 0x1126}, + { 0x5401c, 0x1108}, + { 0x5401e, 0x4}, + { 0x5401f, 0x36e4}, + { 0x54020, 0x32}, + { 0x54021, 0x1126}, + { 0x54022, 0x1108}, + { 0x54024, 0x4}, + { 0x54032, 0xe400}, + { 0x54033, 0x3236}, + { 0x54034, 0x2600}, + { 0x54035, 0x811}, + { 0x54036, 0x11}, + { 0x54037, 0x400}, + { 0x54038, 0xe400}, + { 0x54039, 0x3236}, + { 0x5403a, 0x2600}, + { 0x5403b, 0x811}, + { 0x5403c, 0x11}, + { 0x5403d, 0x400}, + { 0xd0000, 0x1}, +}; + +static struct dram_cfg_param ddr_phy_pie[] = { + { 0xd0000, 0x0}, + { 0x90000, 0x10}, + { 0x90001, 0x400}, + { 0x90002, 0x10e}, + { 0x90003, 0x0}, + { 0x90004, 0x0}, + { 0x90005, 0x8}, + { 0x90029, 0xb}, + { 0x9002a, 0x480}, + { 0x9002b, 0x109}, + { 0x9002c, 0x8}, + { 0x9002d, 0x448}, + { 0x9002e, 0x139}, + { 0x9002f, 0x8}, + { 0x90030, 0x478}, + { 0x90031, 0x109}, + { 0x90032, 0x0}, + { 0x90033, 0xe8}, + { 0x90034, 0x109}, + { 0x90035, 0x2}, + { 0x90036, 0x10}, + { 0x90037, 0x139}, + { 0x90038, 0xb}, + { 0x90039, 0x7c0}, + { 0x9003a, 0x139}, + { 0x9003b, 0x44}, + { 0x9003c, 0x633}, + { 0x9003d, 0x159}, + { 0x9003e, 0x14f}, + { 0x9003f, 0x630}, + { 0x90040, 0x159}, + { 0x90041, 0x47}, + { 0x90042, 0x633}, + { 0x90043, 0x149}, + { 0x90044, 0x4f}, + { 0x90045, 0x633}, + { 0x90046, 0x179}, + { 0x90047, 0x8}, + { 0x90048, 0xe0}, + { 0x90049, 0x109}, + { 0x9004a, 0x0}, + { 0x9004b, 0x7c8}, + { 0x9004c, 0x109}, + { 0x9004d, 0x0}, + { 0x9004e, 0x1}, + { 0x9004f, 0x8}, + { 0x90050, 0x30}, + { 0x90051, 0x65a}, + { 0x90052, 0x9}, + { 0x90053, 0x0}, + { 0x90054, 0x45a}, + { 0x90055, 0x9}, + { 0x90056, 0x0}, + { 0x90057, 0x448}, + { 0x90058, 0x109}, + { 0x90059, 0x40}, + { 0x9005a, 0x633}, + { 0x9005b, 0x179}, + { 0x9005c, 0x1}, + { 0x9005d, 0x618}, + { 0x9005e, 0x109}, + { 0x9005f, 0x40c0}, + { 0x90060, 0x633}, + { 0x90061, 0x149}, + { 0x90062, 0x8}, + { 0x90063, 0x4}, + { 0x90064, 0x48}, + { 0x90065, 0x4040}, + { 0x90066, 0x633}, + { 0x90067, 0x149}, + { 0x90068, 0x0}, + { 0x90069, 0x4}, + { 0x9006a, 0x48}, + { 0x9006b, 0x40}, + { 0x9006c, 0x633}, + { 0x9006d, 0x149}, + { 0x9006e, 0x0}, + { 0x9006f, 0x658}, + { 0x90070, 0x109}, + { 0x90071, 0x10}, + { 0x90072, 0x4}, + { 0x90073, 0x18}, + { 0x90074, 0x0}, + { 0x90075, 0x4}, + { 0x90076, 0x78}, + { 0x90077, 0x549}, + { 0x90078, 0x633}, + { 0x90079, 0x159}, + { 0x9007a, 0xd49}, + { 0x9007b, 0x633}, + { 0x9007c, 0x159}, + { 0x9007d, 0x94a}, + { 0x9007e, 0x633}, + { 0x9007f, 0x159}, + { 0x90080, 0x441}, + { 0x90081, 0x633}, + { 0x90082, 0x149}, + { 0x90083, 0x42}, + { 0x90084, 0x633}, + { 0x90085, 0x149}, + { 0x90086, 0x1}, + { 0x90087, 0x633}, + { 0x90088, 0x149}, + { 0x90089, 0x0}, + { 0x9008a, 0xe0}, + { 0x9008b, 0x109}, + { 0x9008c, 0xa}, + { 0x9008d, 0x10}, + { 0x9008e, 0x109}, + { 0x9008f, 0x9}, + { 0x90090, 0x3c0}, + { 0x90091, 0x149}, + { 0x90092, 0x9}, + { 0x90093, 0x3c0}, + { 0x90094, 0x159}, + { 0x90095, 0x18}, + { 0x90096, 0x10}, + { 0x90097, 0x109}, + { 0x90098, 0x0}, + { 0x90099, 0x3c0}, + { 0x9009a, 0x109}, + { 0x9009b, 0x18}, + { 0x9009c, 0x4}, + { 0x9009d, 0x48}, + { 0x9009e, 0x18}, + { 0x9009f, 0x4}, + { 0x900a0, 0x58}, + { 0x900a1, 0xb}, + { 0x900a2, 0x10}, + { 0x900a3, 0x109}, + { 0x900a4, 0x1}, + { 0x900a5, 0x10}, + { 0x900a6, 0x109}, + { 0x900a7, 0x5}, + { 0x900a8, 0x7c0}, + { 0x900a9, 0x109}, + { 0x40000, 0x811}, + { 0x40020, 0x880}, + { 0x40040, 0x0}, + { 0x40060, 0x0}, + { 0x40001, 0x4008}, + { 0x40021, 0x83}, + { 0x40041, 0x4f}, + { 0x40061, 0x0}, + { 0x40002, 0x4040}, + { 0x40022, 0x83}, + { 0x40042, 0x51}, + { 0x40062, 0x0}, + { 0x40003, 0x811}, + { 0x40023, 0x880}, + { 0x40043, 0x0}, + { 0x40063, 0x0}, + { 0x40004, 0x720}, + { 0x40024, 0xf}, + { 0x40044, 0x1740}, + { 0x40064, 0x0}, + { 0x40005, 0x16}, + { 0x40025, 0x83}, + { 0x40045, 0x4b}, + { 0x40065, 0x0}, + { 0x40006, 0x716}, + { 0x40026, 0xf}, + { 0x40046, 0x2001}, + { 0x40066, 0x0}, + { 0x40007, 0x716}, + { 0x40027, 0xf}, + { 0x40047, 0x2800}, + { 0x40067, 0x0}, + { 0x40008, 0x716}, + { 0x40028, 0xf}, + { 0x40048, 0xf00}, + { 0x40068, 0x0}, + { 0x40009, 0x720}, + { 0x40029, 0xf}, + { 0x40049, 0x1400}, + { 0x40069, 0x0}, + { 0x4000a, 0xe08}, + { 0x4002a, 0xc15}, + { 0x4004a, 0x0}, + { 0x4006a, 0x0}, + { 0x4000b, 0x625}, + { 0x4002b, 0x15}, + { 0x4004b, 0x0}, + { 0x4006b, 0x0}, + { 0x4000c, 0x4028}, + { 0x4002c, 0x80}, + { 0x4004c, 0x0}, + { 0x4006c, 0x0}, + { 0x4000d, 0xe08}, + { 0x4002d, 0xc1a}, + { 0x4004d, 0x0}, + { 0x4006d, 0x0}, + { 0x4000e, 0x625}, + { 0x4002e, 0x1a}, + { 0x4004e, 0x0}, + { 0x4006e, 0x0}, + { 0x4000f, 0x4040}, + { 0x4002f, 0x80}, + { 0x4004f, 0x0}, + { 0x4006f, 0x0}, + { 0x40010, 0x2604}, + { 0x40030, 0x15}, + { 0x40050, 0x0}, + { 0x40070, 0x0}, + { 0x40011, 0x708}, + { 0x40031, 0x5}, + { 0x40051, 0x0}, + { 0x40071, 0x2002}, + { 0x40012, 0x8}, + { 0x40032, 0x80}, + { 0x40052, 0x0}, + { 0x40072, 0x0}, + { 0x40013, 0x2604}, + { 0x40033, 0x1a}, + { 0x40053, 0x0}, + { 0x40073, 0x0}, + { 0x40014, 0x708}, + { 0x40034, 0xa}, + { 0x40054, 0x0}, + { 0x40074, 0x2002}, + { 0x40015, 0x4040}, + { 0x40035, 0x80}, + { 0x40055, 0x0}, + { 0x40075, 0x0}, + { 0x40016, 0x60a}, + { 0x40036, 0x15}, + { 0x40056, 0x1200}, + { 0x40076, 0x0}, + { 0x40017, 0x61a}, + { 0x40037, 0x15}, + { 0x40057, 0x1300}, + { 0x40077, 0x0}, + { 0x40018, 0x60a}, + { 0x40038, 0x1a}, + { 0x40058, 0x1200}, + { 0x40078, 0x0}, + { 0x40019, 0x642}, + { 0x40039, 0x1a}, + { 0x40059, 0x1300}, + { 0x40079, 0x0}, + { 0x4001a, 0x4808}, + { 0x4003a, 0x880}, + { 0x4005a, 0x0}, + { 0x4007a, 0x0}, + { 0x900aa, 0x0}, + { 0x900ab, 0x790}, + { 0x900ac, 0x11a}, + { 0x900ad, 0x8}, + { 0x900ae, 0x7aa}, + { 0x900af, 0x2a}, + { 0x900b0, 0x10}, + { 0x900b1, 0x7b2}, + { 0x900b2, 0x2a}, + { 0x900b3, 0x0}, + { 0x900b4, 0x7c8}, + { 0x900b5, 0x109}, + { 0x900b6, 0x10}, + { 0x900b7, 0x10}, + { 0x900b8, 0x109}, + { 0x900b9, 0x10}, + { 0x900ba, 0x2a8}, + { 0x900bb, 0x129}, + { 0x900bc, 0x8}, + { 0x900bd, 0x370}, + { 0x900be, 0x129}, + { 0x900bf, 0xa}, + { 0x900c0, 0x3c8}, + { 0x900c1, 0x1a9}, + { 0x900c2, 0xc}, + { 0x900c3, 0x408}, + { 0x900c4, 0x199}, + { 0x900c5, 0x14}, + { 0x900c6, 0x790}, + { 0x900c7, 0x11a}, + { 0x900c8, 0x8}, + { 0x900c9, 0x4}, + { 0x900ca, 0x18}, + { 0x900cb, 0xe}, + { 0x900cc, 0x408}, + { 0x900cd, 0x199}, + { 0x900ce, 0x8}, + { 0x900cf, 0x8568}, + { 0x900d0, 0x108}, + { 0x900d1, 0x18}, + { 0x900d2, 0x790}, + { 0x900d3, 0x16a}, + { 0x900d4, 0x8}, + { 0x900d5, 0x1d8}, + { 0x900d6, 0x169}, + { 0x900d7, 0x10}, + { 0x900d8, 0x8558}, + { 0x900d9, 0x168}, + { 0x900da, 0x1ff8}, + { 0x900db, 0x85a8}, + { 0x900dc, 0x1e8}, + { 0x900dd, 0x50}, + { 0x900de, 0x798}, + { 0x900df, 0x16a}, + { 0x900e0, 0x60}, + { 0x900e1, 0x7a0}, + { 0x900e2, 0x16a}, + { 0x900e3, 0x8}, + { 0x900e4, 0x8310}, + { 0x900e5, 0x168}, + { 0x900e6, 0x8}, + { 0x900e7, 0xa310}, + { 0x900e8, 0x168}, + { 0x900e9, 0xa}, + { 0x900ea, 0x408}, + { 0x900eb, 0x169}, + { 0x900ec, 0x6e}, + { 0x900ed, 0x0}, + { 0x900ee, 0x68}, + { 0x900ef, 0x0}, + { 0x900f0, 0x408}, + { 0x900f1, 0x169}, + { 0x900f2, 0x0}, + { 0x900f3, 0x8310}, + { 0x900f4, 0x168}, + { 0x900f5, 0x0}, + { 0x900f6, 0xa310}, + { 0x900f7, 0x168}, + { 0x900f8, 0x1ff8}, + { 0x900f9, 0x85a8}, + { 0x900fa, 0x1e8}, + { 0x900fb, 0x68}, + { 0x900fc, 0x798}, + { 0x900fd, 0x16a}, + { 0x900fe, 0x78}, + { 0x900ff, 0x7a0}, + { 0x90100, 0x16a}, + { 0x90101, 0x68}, + { 0x90102, 0x790}, + { 0x90103, 0x16a}, + { 0x90104, 0x8}, + { 0x90105, 0x8b10}, + { 0x90106, 0x168}, + { 0x90107, 0x8}, + { 0x90108, 0xab10}, + { 0x90109, 0x168}, + { 0x9010a, 0xa}, + { 0x9010b, 0x408}, + { 0x9010c, 0x169}, + { 0x9010d, 0x58}, + { 0x9010e, 0x0}, + { 0x9010f, 0x68}, + { 0x90110, 0x0}, + { 0x90111, 0x408}, + { 0x90112, 0x169}, + { 0x90113, 0x0}, + { 0x90114, 0x8b10}, + { 0x90115, 0x168}, + { 0x90116, 0x1}, + { 0x90117, 0xab10}, + { 0x90118, 0x168}, + { 0x90119, 0x0}, + { 0x9011a, 0x1d8}, + { 0x9011b, 0x169}, + { 0x9011c, 0x80}, + { 0x9011d, 0x790}, + { 0x9011e, 0x16a}, + { 0x9011f, 0x18}, + { 0x90120, 0x7aa}, + { 0x90121, 0x6a}, + { 0x90122, 0xa}, + { 0x90123, 0x0}, + { 0x90124, 0x1e9}, + { 0x90125, 0x8}, + { 0x90126, 0x8080}, + { 0x90127, 0x108}, + { 0x90128, 0xf}, + { 0x90129, 0x408}, + { 0x9012a, 0x169}, + { 0x9012b, 0xc}, + { 0x9012c, 0x0}, + { 0x9012d, 0x68}, + { 0x9012e, 0x9}, + { 0x9012f, 0x0}, + { 0x90130, 0x1a9}, + { 0x90131, 0x0}, + { 0x90132, 0x408}, + { 0x90133, 0x169}, + { 0x90134, 0x0}, + { 0x90135, 0x8080}, + { 0x90136, 0x108}, + { 0x90137, 0x8}, + { 0x90138, 0x7aa}, + { 0x90139, 0x6a}, + { 0x9013a, 0x0}, + { 0x9013b, 0x8568}, + { 0x9013c, 0x108}, + { 0x9013d, 0xb7}, + { 0x9013e, 0x790}, + { 0x9013f, 0x16a}, + { 0x90140, 0x1f}, + { 0x90141, 0x0}, + { 0x90142, 0x68}, + { 0x90143, 0x8}, + { 0x90144, 0x8558}, + { 0x90145, 0x168}, + { 0x90146, 0xf}, + { 0x90147, 0x408}, + { 0x90148, 0x169}, + { 0x90149, 0xd}, + { 0x9014a, 0x0}, + { 0x9014b, 0x68}, + { 0x9014c, 0x0}, + { 0x9014d, 0x408}, + { 0x9014e, 0x169}, + { 0x9014f, 0x0}, + { 0x90150, 0x8558}, + { 0x90151, 0x168}, + { 0x90152, 0x8}, + { 0x90153, 0x3c8}, + { 0x90154, 0x1a9}, + { 0x90155, 0x3}, + { 0x90156, 0x370}, + { 0x90157, 0x129}, + { 0x90158, 0x20}, + { 0x90159, 0x2aa}, + { 0x9015a, 0x9}, + { 0x9015b, 0x8}, + { 0x9015c, 0xe8}, + { 0x9015d, 0x109}, + { 0x9015e, 0x0}, + { 0x9015f, 0x8140}, + { 0x90160, 0x10c}, + { 0x90161, 0x10}, + { 0x90162, 0x8138}, + { 0x90163, 0x104}, + { 0x90164, 0x8}, + { 0x90165, 0x448}, + { 0x90166, 0x109}, + { 0x90167, 0xf}, + { 0x90168, 0x7c0}, + { 0x90169, 0x109}, + { 0x9016a, 0x0}, + { 0x9016b, 0xe8}, + { 0x9016c, 0x109}, + { 0x9016d, 0x47}, + { 0x9016e, 0x630}, + { 0x9016f, 0x109}, + { 0x90170, 0x8}, + { 0x90171, 0x618}, + { 0x90172, 0x109}, + { 0x90173, 0x8}, + { 0x90174, 0xe0}, + { 0x90175, 0x109}, + { 0x90176, 0x0}, + { 0x90177, 0x7c8}, + { 0x90178, 0x109}, + { 0x90179, 0x8}, + { 0x9017a, 0x8140}, + { 0x9017b, 0x10c}, + { 0x9017c, 0x0}, + { 0x9017d, 0x478}, + { 0x9017e, 0x109}, + { 0x9017f, 0x0}, + { 0x90180, 0x1}, + { 0x90181, 0x8}, + { 0x90182, 0x8}, + { 0x90183, 0x4}, + { 0x90184, 0x0}, + { 0x90006, 0x8}, + { 0x90007, 0x7c8}, + { 0x90008, 0x109}, + { 0x90009, 0x0}, + { 0x9000a, 0x400}, + { 0x9000b, 0x106}, + { 0xd00e7, 0x400}, + { 0x90017, 0x0}, + { 0x9001f, 0x2b}, + { 0x90026, 0x69}, + { 0x400d0, 0x0}, + { 0x400d1, 0x101}, + { 0x400d2, 0x105}, + { 0x400d3, 0x107}, + { 0x400d4, 0x10f}, + { 0x400d5, 0x202}, + { 0x400d6, 0x20a}, + { 0x400d7, 0x20b}, + { 0x2003a, 0x2}, + { 0x200be, 0x3}, + { 0x2000b, 0x75}, + { 0x2000c, 0xe9}, + { 0x2000d, 0x91c}, + { 0x2000e, 0x2c}, + { 0x12000b, 0x3b}, + { 0x12000c, 0x74}, + { 0x12000d, 0x48e}, + { 0x12000e, 0x2c}, + { 0x22000b, 0x14}, + { 0x22000c, 0x27}, + { 0x22000d, 0x186}, + { 0x22000e, 0x10}, + { 0x9000c, 0x0}, + { 0x9000d, 0x173}, + { 0x9000e, 0x60}, + { 0x9000f, 0x6110}, + { 0x90010, 0x2152}, + { 0x90011, 0xdfbd}, + { 0x90012, 0x2060}, + { 0x90013, 0x6152}, + { 0x20010, 0x5a}, + { 0x20011, 0x3}, + { 0x120010, 0x5a}, + { 0x120011, 0x3}, + { 0x40080, 0xe0}, + { 0x40081, 0x12}, + { 0x40082, 0xe0}, + { 0x40083, 0x12}, + { 0x40084, 0xe0}, + { 0x40085, 0x12}, + { 0x140080, 0xe0}, + { 0x140081, 0x12}, + { 0x140082, 0xe0}, + { 0x140083, 0x12}, + { 0x140084, 0xe0}, + { 0x140085, 0x12}, + { 0x240080, 0xe0}, + { 0x240081, 0x12}, + { 0x240082, 0xe0}, + { 0x240083, 0x12}, + { 0x240084, 0xe0}, + { 0x240085, 0x12}, + { 0x400fd, 0xf}, + { 0x400f1, 0xe}, + { 0x10011, 0x1}, + { 0x10012, 0x1}, + { 0x10013, 0x180}, + { 0x10018, 0x1}, + { 0x10002, 0x6209}, + { 0x100b2, 0x1}, + { 0x101b4, 0x1}, + { 0x102b4, 0x1}, + { 0x103b4, 0x1}, + { 0x104b4, 0x1}, + { 0x105b4, 0x1}, + { 0x106b4, 0x1}, + { 0x107b4, 0x1}, + { 0x108b4, 0x1}, + { 0x11011, 0x1}, + { 0x11012, 0x1}, + { 0x11013, 0x180}, + { 0x11018, 0x1}, + { 0x11002, 0x6209}, + { 0x110b2, 0x1}, + { 0x111b4, 0x1}, + { 0x112b4, 0x1}, + { 0x113b4, 0x1}, + { 0x114b4, 0x1}, + { 0x115b4, 0x1}, + { 0x116b4, 0x1}, + { 0x117b4, 0x1}, + { 0x118b4, 0x1}, + { 0x20089, 0x1}, + { 0x20088, 0x19}, + { 0xc0080, 0x0}, + /* workaround STAR_3256585 marker */ + { 0x2000b, 0x41a}, + /* workaround STAR_3256585 marker */ + { 0x12000b, 0x20d}, + /* workaround STAR_3256585 marker */ + { 0x22000b, 0xb0}, + { 0xd0000, 0x1}, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 3733mts 1D */ + .drate = 3733, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 1866mts 1D */ + .drate = 1866, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 625mts 1D */ + .drate = 625, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 3733mts 2D */ + .drate = 3733, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info dram_timing_2CS_2GB = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_trained_csr = ddr_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 3733, 1866, 625, }, + .fsp_cfg = ddr_dram_fsp_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_dram_fsp_cfg), +}; diff --git a/board/nxp/imx93_frdm/spl.c b/board/nxp/imx93_frdm/spl.c index 068091ba0e9..40054ff72d0 100644 --- a/board/nxp/imx93_frdm/spl.c +++ b/board/nxp/imx93_frdm/spl.c @@ -33,9 +33,10 @@ static struct _drams { u8 mr8; struct dram_timing_info *pdram_timing; char *name; -} frdm_drams[2] = { +} frdm_drams[3] = { {0x10, &dram_timing_1GB, "1GB DRAM" }, - {0x18, &dram_timing_2GB, "2GB DRAM" }, + {0x12, &dram_timing_2CS_2GB, "2CS_2GB DRAM" }, + {0x18, &dram_timing_1CS_2GB, "1CS_2GB DRAM" }, }; int spl_board_boot_device(enum boot_device boot_dev_spl) diff --git a/board/nxp/imx93_qsb/imx93_qsb.env b/board/nxp/imx93_qsb/imx93_qsb.env index d669c6e3133..d14a1b6c9bd 100644 --- a/board/nxp/imx93_qsb/imx93_qsb.env +++ b/board/nxp/imx93_qsb/imx93_qsb.env @@ -10,6 +10,10 @@ fdt_addr_r=0x83000000 fdt_addr=0x83000000 fdtfile=DEFAULT_FDT_FILE image=Image +ip_dyn=yes +kernel_addr_r=CONFIG_SYS_LOAD_ADDR +kernel_comp_addr_r=0xC0000000 +kernel_comp_size=0x2000000 mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX mmcpart=1 mmcroot=/dev/mmcblk1p2 rootwait rw diff --git a/board/nxp/imx94_evk/imx94_evk.c b/board/nxp/imx94_evk/imx94_evk.c index 4731b79b55d..02149afae87 100644 --- a/board/nxp/imx94_evk/imx94_evk.c +++ b/board/nxp/imx94_evk/imx94_evk.c @@ -7,7 +7,7 @@ #include <fdt_support.h> #include <asm/gpio.h> #include <asm/arch/clock.h> -#include <asm/mach-imx/sys_proto.h> +#include <asm/arch/sys_proto.h> int board_init(void) { @@ -26,3 +26,11 @@ int board_late_init(void) return 0; } + +#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) +int board_fix_fdt(void *fdt) +{ + /* Remove nodes based on fuses. */ + return imx9_uboot_fixup_by_fuse(fdt); +} +#endif diff --git a/board/nxp/imx94_evk/imx94_evk.env b/board/nxp/imx94_evk/imx94_evk.env index 894f5975812..c2006c95529 100644 --- a/board/nxp/imx94_evk/imx94_evk.env +++ b/board/nxp/imx94_evk/imx94_evk.env @@ -19,7 +19,10 @@ initrd_addr=0x93800000 emmc_dev=0 sd_dev=1 scriptaddr=0x93500000 +ip_dyn=yes kernel_addr_r=CONFIG_SYS_LOAD_ADDR +kernel_comp_addr_r=0xC0000000 +kernel_comp_size=0x2000000 image=Image splashimage=0xA0000000 console=ttyLP0,115200 earlycon diff --git a/board/nxp/imx94_evk/spl.c b/board/nxp/imx94_evk/spl.c index 6eb0fff99f4..739a5f1f559 100644 --- a/board/nxp/imx94_evk/spl.c +++ b/board/nxp/imx94_evk/spl.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2025 NXP + * Copyright 2025-2026 NXP */ #include <hang.h> @@ -14,6 +14,7 @@ #include <asm/arch/sys_proto.h> #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/ele_api.h> +#include <asm/mach-imx/qb.h> DECLARE_GLOBAL_DATA_PTR; @@ -44,6 +45,9 @@ void spl_board_init(void) ret = ele_start_rng(); if (ret) printf("Fail to start RNG: %d\n", ret); + + if (IS_ENABLED(CONFIG_SPL_IMX_QB)) + spl_imx_qb_save(); } static void xspi_nor_reset(void) diff --git a/board/nxp/imx952_evk/imx952_evk.c b/board/nxp/imx952_evk/imx952_evk.c index 2a61817939e..b5c2da032a8 100644 --- a/board/nxp/imx952_evk/imx952_evk.c +++ b/board/nxp/imx952_evk/imx952_evk.c @@ -24,3 +24,11 @@ int board_late_init(void) return 0; } + +#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) +int board_fix_fdt(void *fdt) +{ + /* Remove nodes based on fuses. */ + return imx9_uboot_fixup_by_fuse(fdt); +} +#endif diff --git a/board/nxp/imx952_evk/imx952_evk.env b/board/nxp/imx952_evk/imx952_evk.env index 6ecaf9724c1..07faeb9fc9a 100644 --- a/board/nxp/imx952_evk/imx952_evk.env +++ b/board/nxp/imx952_evk/imx952_evk.env @@ -52,7 +52,10 @@ initrd_addr=0x93800000 emmc_dev=0 sd_dev=1 scriptaddr=0x93500000 +ip_dyn=yes kernel_addr_r=CONFIG_SYS_LOAD_ADDR +kernel_comp_addr_r=0xC0000000 +kernel_comp_size=0x2000000 image=Image splashimage=0xA0000000 console=ttyLP0,115200 earlycon diff --git a/board/nxp/imx952_evk/spl.c b/board/nxp/imx952_evk/spl.c index de9256dc267..615c3b67fb6 100644 --- a/board/nxp/imx952_evk/spl.c +++ b/board/nxp/imx952_evk/spl.c @@ -8,6 +8,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/ele_api.h> +#include <asm/mach-imx/qb.h> #include <asm/sections.h> #include <hang.h> #include <init.h> @@ -44,6 +45,9 @@ void spl_board_init(void) ret = ele_start_rng(); if (ret) printf("Fail to start RNG: %d\n", ret); + + if (IS_ENABLED(CONFIG_SPL_IMX_QB)) + spl_imx_qb_save(); } static void xspi_nor_reset(void) diff --git a/board/nxp/imx95_evk/imx95_evk.c b/board/nxp/imx95_evk/imx95_evk.c index 99a37e0593f..394d6fd459c 100644 --- a/board/nxp/imx95_evk/imx95_evk.c +++ b/board/nxp/imx95_evk/imx95_evk.c @@ -5,7 +5,7 @@ #include <asm/gpio.h> #include <asm/arch/clock.h> -#include <asm/mach-imx/sys_proto.h> +#include <asm/arch/sys_proto.h> int board_late_init(void) { @@ -14,3 +14,11 @@ int board_late_init(void) return 0; } + +#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) +int board_fix_fdt(void *fdt) +{ + /* Remove nodes based on fuses. */ + return imx9_uboot_fixup_by_fuse(fdt); +} +#endif diff --git a/board/nxp/imx95_evk/imx95_evk.env b/board/nxp/imx95_evk/imx95_evk.env index 19f9bd5c16e..1d63a74aefa 100644 --- a/board/nxp/imx95_evk/imx95_evk.env +++ b/board/nxp/imx95_evk/imx95_evk.env @@ -3,8 +3,11 @@ initrd_addr=0x93800000 emmc_dev=0 sd_dev=1 scriptaddr=0x93500000 -kernel_addr_r=CONFIG_SYS_LOAD_ADDR image=Image +ip_dyn=yes +kernel_addr_r=CONFIG_SYS_LOAD_ADDR +kernel_comp_addr_r=0xC0000000 +kernel_comp_size=0x2000000 splashimage=0xA0000000 console=ttyLP0,115200 earlycon fdt_addr_r=0x93000000 diff --git a/board/nxp/imx95_evk/spl.c b/board/nxp/imx95_evk/spl.c index 761a1a4a0f6..2fd69447e1e 100644 --- a/board/nxp/imx95_evk/spl.c +++ b/board/nxp/imx95_evk/spl.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2025 NXP + * Copyright 2025-2026 NXP */ #include <hang.h> @@ -13,6 +13,7 @@ #include <asm/arch/sys_proto.h> #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/ele_api.h> +#include <asm/mach-imx/qb.h> DECLARE_GLOBAL_DATA_PTR; @@ -41,6 +42,9 @@ void spl_board_init(void) ret = ele_start_rng(); if (ret) printf("Fail to start RNG: %d\n", ret); + + if (IS_ENABLED(CONFIG_SPL_IMX_QB)) + spl_imx_qb_save(); } void board_init_f(ulong dummy) diff --git a/board/nxp/imxrt1020-evk/imxrt1020-evk.c b/board/nxp/imxrt1020-evk/imxrt1020-evk.c index 11dbef84688..6843b33679d 100644 --- a/board/nxp/imxrt1020-evk/imxrt1020-evk.c +++ b/board/nxp/imxrt1020-evk/imxrt1020-evk.c @@ -73,7 +73,7 @@ u32 spl_boot_device(void) int board_init(void) { - gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; + gd->bd->bi_boot_params = gd->dram[0].start + 0x100; return 0; } diff --git a/board/nxp/imxrt1050-evk/imxrt1050-evk.c b/board/nxp/imxrt1050-evk/imxrt1050-evk.c index 056489932ac..19d068fc626 100644 --- a/board/nxp/imxrt1050-evk/imxrt1050-evk.c +++ b/board/nxp/imxrt1050-evk/imxrt1050-evk.c @@ -78,7 +78,7 @@ u32 spl_boot_device(void) int board_init(void) { - gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; + gd->bd->bi_boot_params = gd->dram[0].start + 0x100; return 0; } diff --git a/board/nxp/imxrt1170-evk/imxrt1170-evk.c b/board/nxp/imxrt1170-evk/imxrt1170-evk.c index 047aea8181a..3afd5ae2136 100644 --- a/board/nxp/imxrt1170-evk/imxrt1170-evk.c +++ b/board/nxp/imxrt1170-evk/imxrt1170-evk.c @@ -73,7 +73,7 @@ u32 spl_boot_device(void) int board_init(void) { - gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; + gd->bd->bi_boot_params = gd->dram[0].start + 0x100; return 0; } diff --git a/board/nxp/ls1012ardb/Kconfig b/board/nxp/ls1012ardb/Kconfig index bbe5ce21109..ff5a57aaa41 100644 --- a/board/nxp/ls1012ardb/Kconfig +++ b/board/nxp/ls1012ardb/Kconfig @@ -63,7 +63,7 @@ config SYS_BOARD default "ls1012ardb" config SYS_VENDOR - default "nxp" + default "nxp" config SYS_SOC default "fsl-layerscape" diff --git a/board/nxp/ls1021aqds/ddr.c b/board/nxp/ls1021aqds/ddr.c index fd897e832c8..8d07f6110ce 100644 --- a/board/nxp/ls1021aqds/ddr.c +++ b/board/nxp/ls1021aqds/ddr.c @@ -192,8 +192,8 @@ int fsl_initdram(void) int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = gd->ram_size; + gd->dram[0].start = CFG_SYS_SDRAM_BASE; + gd->dram[0].size = gd->ram_size; return 0; } diff --git a/board/nxp/ls1028a/ls1028a.c b/board/nxp/ls1028a/ls1028a.c index 007125358bd..e1e83137f4d 100644 --- a/board/nxp/ls1028a/ls1028a.c +++ b/board/nxp/ls1028a/ls1028a.c @@ -26,7 +26,9 @@ #include <fdtdec.h> #include <miiphy.h> #include "../common/qixis.h" +#ifdef CONFIG_FSL_ENETC #include "../drivers/net/fsl_enetc.h" +#endif DECLARE_GLOBAL_DATA_PTR; @@ -147,7 +149,7 @@ int board_early_init_f(void) void detail_board_ddr_info(void) { puts("\nDDR "); - print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); + print_size(gd->dram[0].size + gd->dram[1].size, ""); print_ddr_info(0); } @@ -200,10 +202,10 @@ int ft_board_setup(void *blob, struct bd_info *bd) ft_cpu_setup(blob, bd); /* fixup DT for the two GPP DDR banks */ - base[0] = gd->bd->bi_dram[0].start; - size[0] = gd->bd->bi_dram[0].size; - base[1] = gd->bd->bi_dram[1].start; - size[1] = gd->bd->bi_dram[1].size; + base[0] = gd->dram[0].start; + size[0] = gd->dram[0].size; + base[1] = gd->dram[1].start; + size[1] = gd->dram[1].size; #ifdef CONFIG_RESV_RAM /* reduce size if reserved memory is within this bank */ diff --git a/board/nxp/ls1028a/ls1028ardb.env b/board/nxp/ls1028a/ls1028ardb.env new file mode 100644 index 00000000000..dc1cb01e50a --- /dev/null +++ b/board/nxp/ls1028a/ls1028ardb.env @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +board=ls1028ardb +hwconfig=fsl_ddr:bank_intlv=auto +fdtfile=fsl-ls1028a-rdb.dtb +image=Image +extra_bootargs=iommu.passthrough=1 arm-smmu.disable_bypass=0 +othbootargs=video=1920x1080-32@60 cma=640M +ramdisk_addr=0x800000 +ramdisk_size=0x2000000 +bootm_size=0x10000000 +kernel_addr=0x01000000 +scriptaddr=0x80000000 +scripthdraddr=0x80080000 +fdtheader_addr_r=0x80100000 +kernelheader_addr_r=0x80200000 +load_addr=0xa0000000 +kernel_addr_r=0x81000000 +fdt_addr_r=0x90000000 +ramdisk_addr_r=0xa0000000 +kernel_start=0x1000000 +kernelheader_start=0x600000 +kernel_load=0xa0000000 +kernel_size=0x2800000 +kernelheader_size=0x40000 +kernel_addr_sd=0x8000 +kernel_size_sd=0x14000 +kernelhdr_addr_sd=0x3000 +kernelhdr_size_sd=0x20 +console=ttyS0,115200 +console_dbg=earlycon=uart8250,mmio,0x21c0500 +boot_script_hdr=hdr_ls1028ardb_bs.out +xspi_bootcmd=echo Trying load from FlexSPI flash ...;sf probe 0:0 && sf read $load_addr + $kernel_start $kernel_size ; env exists secureboot &&sf read $kernelheader_addr_r + $kernelheader_start $kernelheader_size && esbc_validate ${kernelheader_addr_r}; bootm + $load_addr#$board +xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;sf probe 0:0 && sf read + $load_addr 0x940000 0x30000 && hdp load $load_addr 0x2000 +sd_bootcmd=echo Trying load from SD ...;mmc dev 0;mmcinfo; mmc read $load_addr $kernel_addr_sd + $kernel_size_sd && env exists secureboot && mmc read $kernelheader_addr_r $kernelhdr_addr_sd + $kernelhdr_size_sd && esbc_validate ${kernelheader_addr_r};bootm $load_addr#$board +sd_hdploadcmd=echo Trying load HDP firmware from SD..;mmc dev 0;mmcinfo;mmc read $load_addr + 0x4a00 0x200 && hdp load $load_addr 0x2000 +emmc_bootcmd=echo Trying load from EMMC ..;mmc dev 1;mmcinfo; mmc read $load_addr + $kernel_addr_sd $kernel_size_sd && env exists secureboot && mmc read $kernelheader_addr_r + $kernelhdr_addr_sd $kernelhdr_size_sd && esbc_validate ${kernelheader_addr_r};bootm + $load_addr#$board +emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;mmc dev 1;mmcinfo;mmc read $load_addr + 0x4a00 0x200 && hdp load $load_addr 0x2000 diff --git a/board/nxp/ls1043aqds/ls1043aqds.c b/board/nxp/ls1043aqds/ls1043aqds.c index 0f115c16232..dba93add698 100644 --- a/board/nxp/ls1043aqds/ls1043aqds.c +++ b/board/nxp/ls1043aqds/ls1043aqds.c @@ -542,10 +542,10 @@ int ft_board_setup(void *blob, struct bd_info *bd) u8 reg; /* fixup DT for the two DDR banks */ - base[0] = gd->bd->bi_dram[0].start; - size[0] = gd->bd->bi_dram[0].size; - base[1] = gd->bd->bi_dram[1].start; - size[1] = gd->bd->bi_dram[1].size; + base[0] = gd->dram[0].start; + size[0] = gd->dram[0].size; + base[1] = gd->dram[1].start; + size[1] = gd->dram[1].size; fdt_fixup_memory_banks(blob, base, size, 2); ft_cpu_setup(blob, bd); diff --git a/board/nxp/ls1043ardb/ls1043ardb.c b/board/nxp/ls1043ardb/ls1043ardb.c index bba041065b5..678c529cf55 100644 --- a/board/nxp/ls1043ardb/ls1043ardb.c +++ b/board/nxp/ls1043ardb/ls1043ardb.c @@ -305,10 +305,10 @@ int ft_board_setup(void *blob, struct bd_info *bd) u64 size[CONFIG_NR_DRAM_BANKS]; /* fixup DT for the two DDR banks */ - base[0] = gd->bd->bi_dram[0].start; - size[0] = gd->bd->bi_dram[0].size; - base[1] = gd->bd->bi_dram[1].start; - size[1] = gd->bd->bi_dram[1].size; + base[0] = gd->dram[0].start; + size[0] = gd->dram[0].size; + base[1] = gd->dram[1].start; + size[1] = gd->dram[1].size; fdt_fixup_memory_banks(blob, base, size, 2); ft_cpu_setup(blob, bd); diff --git a/board/nxp/ls1046afrwy/ls1046afrwy.c b/board/nxp/ls1046afrwy/ls1046afrwy.c index 8889c24f1f0..6c35c0a4347 100644 --- a/board/nxp/ls1046afrwy/ls1046afrwy.c +++ b/board/nxp/ls1046afrwy/ls1046afrwy.c @@ -198,10 +198,10 @@ int ft_board_setup(void *blob, struct bd_info *bd) u64 size[CONFIG_NR_DRAM_BANKS]; /* fixup DT for the two DDR banks */ - base[0] = gd->bd->bi_dram[0].start; - size[0] = gd->bd->bi_dram[0].size; - base[1] = gd->bd->bi_dram[1].start; - size[1] = gd->bd->bi_dram[1].size; + base[0] = gd->dram[0].start; + size[0] = gd->dram[0].size; + base[1] = gd->dram[1].start; + size[1] = gd->dram[1].size; fdt_fixup_memory_banks(blob, base, size, 2); ft_cpu_setup(blob, bd); diff --git a/board/nxp/ls1046aqds/ls1046aqds.c b/board/nxp/ls1046aqds/ls1046aqds.c index 679b0b2235f..ddd9993986f 100644 --- a/board/nxp/ls1046aqds/ls1046aqds.c +++ b/board/nxp/ls1046aqds/ls1046aqds.c @@ -426,10 +426,10 @@ int ft_board_setup(void *blob, struct bd_info *bd) u8 reg; /* fixup DT for the two DDR banks */ - base[0] = gd->bd->bi_dram[0].start; - size[0] = gd->bd->bi_dram[0].size; - base[1] = gd->bd->bi_dram[1].start; - size[1] = gd->bd->bi_dram[1].size; + base[0] = gd->dram[0].start; + size[0] = gd->dram[0].size; + base[1] = gd->dram[1].start; + size[1] = gd->dram[1].size; fdt_fixup_memory_banks(blob, base, size, 2); ft_cpu_setup(blob, bd); diff --git a/board/nxp/ls1046ardb/ls1046ardb.c b/board/nxp/ls1046ardb/ls1046ardb.c index 83b280f7646..6677e271029 100644 --- a/board/nxp/ls1046ardb/ls1046ardb.c +++ b/board/nxp/ls1046ardb/ls1046ardb.c @@ -171,10 +171,10 @@ int ft_board_setup(void *blob, struct bd_info *bd) u64 size[CONFIG_NR_DRAM_BANKS]; /* fixup DT for the two DDR banks */ - base[0] = gd->bd->bi_dram[0].start; - size[0] = gd->bd->bi_dram[0].size; - base[1] = gd->bd->bi_dram[1].start; - size[1] = gd->bd->bi_dram[1].size; + base[0] = gd->dram[0].start; + size[0] = gd->dram[0].size; + base[1] = gd->dram[1].start; + size[1] = gd->dram[1].size; fdt_fixup_memory_banks(blob, base, size, 2); ft_cpu_setup(blob, bd); diff --git a/board/nxp/ls1088a/ls1088a.c b/board/nxp/ls1088a/ls1088a.c index 5783dd8a403..8ea76fe3760 100644 --- a/board/nxp/ls1088a/ls1088a.c +++ b/board/nxp/ls1088a/ls1088a.c @@ -7,6 +7,7 @@ #include <display_options.h> #include <env.h> #include <i2c.h> +#include <pmbus.h> #include <init.h> #include <log.h> #include <malloc.h> @@ -667,13 +668,13 @@ int get_serdes_volt(void) /* Select the PAGE 0 using PMBus commands PAGE for VDD */ #if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_write(I2C_SVDD_MONITOR_ADDR, - PMBUS_CMD_PAGE, 1, &chan, 1); + PMBUS_PAGE, 1, &chan, 1); #else struct udevice *dev; ret = i2c_get_chip_for_busnum(0, I2C_SVDD_MONITOR_ADDR, 1, &dev); if (!ret) - ret = dm_i2c_write(dev, PMBUS_CMD_PAGE, + ret = dm_i2c_write(dev, PMBUS_PAGE, &chan, 1); #endif @@ -685,9 +686,9 @@ int get_serdes_volt(void) /* Read the output voltage using PMBus command READ_VOUT */ #if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_read(I2C_SVDD_MONITOR_ADDR, - PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2); + PMBUS_READ_VOUT, 1, (void *)&vcode, 2); #else - dm_i2c_read(dev, PMBUS_CMD_READ_VOUT, (void *)&vcode, 2); + dm_i2c_read(dev, PMBUS_READ_VOUT, (void *)&vcode, 2); #endif if (ret) { printf("VID: failed to read the voltage\n"); @@ -700,7 +701,7 @@ int get_serdes_volt(void) int set_serdes_volt(int svdd) { int ret, vdd_last; - u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND, + u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_VOUT_COMMAND, svdd & 0xFF, (svdd & 0xFF00) >> 8}; /* Write the desired voltage code to the SVDD regulator */ @@ -830,7 +831,7 @@ int board_init(void) void detail_board_ddr_info(void) { puts("\nDDR "); - print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); + print_size(gd->dram[0].size + gd->dram[1].size, ""); print_ddr_info(0); } @@ -959,8 +960,8 @@ int ft_board_setup(void *blob, struct bd_info *bd) /* fixup DT for the two GPP DDR banks */ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - base[i] = gd->bd->bi_dram[i].start; - size[i] = gd->bd->bi_dram[i].size; + base[i] = gd->dram[i].start; + size[i] = gd->dram[i].size; } #ifdef CONFIG_RESV_RAM diff --git a/board/nxp/ls2080aqds/ls2080aqds.c b/board/nxp/ls2080aqds/ls2080aqds.c index aba0560181a..325dc817aaf 100644 --- a/board/nxp/ls2080aqds/ls2080aqds.c +++ b/board/nxp/ls2080aqds/ls2080aqds.c @@ -253,12 +253,12 @@ int misc_init_r(void) void detail_board_ddr_info(void) { puts("\nDDR "); - print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); + print_size(gd->dram[0].size + gd->dram[1].size, ""); print_ddr_info(0); #ifdef CONFIG_SYS_FSL_HAS_DP_DDR - if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) { + if (soc_has_dp_ddr() && gd->dram[2].size) { puts("\nDP-DDR "); - print_size(gd->bd->bi_dram[2].size, ""); + print_size(gd->dram[2].size, ""); print_ddr_info(CONFIG_DP_DDR_CTRL); } #endif @@ -302,10 +302,10 @@ int ft_board_setup(void *blob, struct bd_info *bd) ft_cpu_setup(blob, bd); /* fixup DT for the two GPP DDR banks */ - base[0] = gd->bd->bi_dram[0].start; - size[0] = gd->bd->bi_dram[0].size; - base[1] = gd->bd->bi_dram[1].start; - size[1] = gd->bd->bi_dram[1].size; + base[0] = gd->dram[0].start; + size[0] = gd->dram[0].size; + base[1] = gd->dram[1].start; + size[1] = gd->dram[1].size; #ifdef CONFIG_RESV_RAM /* reduce size if reserved memory is within this bank */ diff --git a/board/nxp/ls2080ardb/ls2080ardb.c b/board/nxp/ls2080ardb/ls2080ardb.c index d08598d1c62..9dec818280b 100644 --- a/board/nxp/ls2080ardb/ls2080ardb.c +++ b/board/nxp/ls2080ardb/ls2080ardb.c @@ -359,12 +359,12 @@ int misc_init_r(void) void detail_board_ddr_info(void) { puts("\nDDR "); - print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); + print_size(gd->dram[0].size + gd->dram[1].size, ""); print_ddr_info(0); #ifdef CONFIG_SYS_FSL_HAS_DP_DDR - if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) { + if (soc_has_dp_ddr() && gd->dram[2].size) { puts("\nDP-DDR "); - print_size(gd->bd->bi_dram[2].size, ""); + print_size(gd->dram[2].size, ""); print_ddr_info(CONFIG_DP_DDR_CTRL); } #endif @@ -487,10 +487,10 @@ int ft_board_setup(void *blob, struct bd_info *bd) size = calloc(total_memory_banks, sizeof(u64)); /* fixup DT for the two GPP DDR banks */ - base[0] = gd->bd->bi_dram[0].start; - size[0] = gd->bd->bi_dram[0].size; - base[1] = gd->bd->bi_dram[1].start; - size[1] = gd->bd->bi_dram[1].size; + base[0] = gd->dram[0].start; + size[0] = gd->dram[0].size; + base[1] = gd->dram[1].start; + size[1] = gd->dram[1].size; #ifdef CONFIG_RESV_RAM /* reduce size if reserved memory is within this bank */ diff --git a/board/nxp/lx2160a/lx2160a.c b/board/nxp/lx2160a/lx2160a.c index b7a6ccf46aa..10729dfaf24 100644 --- a/board/nxp/lx2160a/lx2160a.c +++ b/board/nxp/lx2160a/lx2160a.c @@ -573,7 +573,7 @@ void detail_board_ddr_info(void) puts("\nDDR "); for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - ddr_size += gd->bd->bi_dram[i].size; + ddr_size += gd->dram[i].size; print_size(ddr_size, ""); print_ddr_info(0); } @@ -808,8 +808,8 @@ int ft_board_setup(void *blob, struct bd_info *bd) /* fixup DT for the three GPP DDR banks */ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - base[i] = gd->bd->bi_dram[i].start; - size[i] = gd->bd->bi_dram[i].size; + base[i] = gd->dram[i].start; + size[i] = gd->dram[i].size; } #ifdef CONFIG_RESV_RAM diff --git a/board/nxp/mx6memcal/Kconfig b/board/nxp/mx6memcal/Kconfig index a6c39d5e4d1..03d8422242f 100644 --- a/board/nxp/mx6memcal/Kconfig +++ b/board/nxp/mx6memcal/Kconfig @@ -35,30 +35,30 @@ choice The choices below reflect the most commonly used options for your UART. - config UART2_EIM_D26_27 - bool "UART2 on EIM_D26/27 (SabreLite, Nitrogen6x)" - depends on SERIAL_CONSOLE_UART2 - help - Choose this configuration if you're using pads - EIM_D26 and D27 for a console on UART2. - This is typical for designs that are based on the - NXP SABRELite. +config UART2_EIM_D26_27 + bool "UART2 on EIM_D26/27 (SabreLite, Nitrogen6x)" + depends on SERIAL_CONSOLE_UART2 + help + Choose this configuration if you're using pads + EIM_D26 and D27 for a console on UART2. + This is typical for designs that are based on the + NXP SABRELite. - config UART1_CSI0_DAT10_11 - bool "UART1 on CSI0_DAT10/11 (Wand, SabreSD)" - depends on SERIAL_CONSOLE_UART1 - help - Choose this configuration if you're using pads - CSI0_DAT10 and DAT11 for a console on UART1 as - is done on the i.MX6 Wand board and i.MX6 SabreSD. +config UART1_CSI0_DAT10_11 + bool "UART1 on CSI0_DAT10/11 (Wand, SabreSD)" + depends on SERIAL_CONSOLE_UART1 + help + Choose this configuration if you're using pads + CSI0_DAT10 and DAT11 for a console on UART1 as + is done on the i.MX6 Wand board and i.MX6 SabreSD. - config UART1_UART1 - bool "UART1 on UART1 (i.MX6SL EVK, WaRP)" - depends on SERIAL_CONSOLE_UART1 - help - Choose this configuration if you're using pads - UART1_TXD/RXD for a console on UART1 as is done - on most i.MX6SL designs. +config UART1_UART1 + bool "UART1 on UART1 (i.MX6SL EVK, WaRP)" + depends on SERIAL_CONSOLE_UART1 + help + Choose this configuration if you're using pads + UART1_TXD/RXD for a console on UART1 as is done + on most i.MX6SL designs. endchoice @@ -215,12 +215,12 @@ config REFR range 0 7 default 7 help - This selects the number of refreshes (-1) during each period. - i.e.: - 0 == 1 refresh (tRFC) - 7 == 8 refreshes (tRFC*8) - See the description of MDREF[REFR] in the reference manual for - details. + This selects the number of refreshes (-1) during each period. + i.e.: + 0 == 1 refresh (tRFC) + 7 == 8 refreshes (tRFC*8) + See the description of MDREF[REFR] in the reference manual for + details. endmenu diff --git a/board/nxp/mx6sabreauto/mx6sabreauto.env b/board/nxp/mx6sabreauto/mx6sabreauto.env new file mode 100644 index 00000000000..31a16905ef5 --- /dev/null +++ b/board/nxp/mx6sabreauto/mx6sabreauto.env @@ -0,0 +1,5 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +console=ttymxc3 + +#include <env/nxp/mx6sabre_common.env> diff --git a/board/nxp/mx6sabresd/mx6sabresd.env b/board/nxp/mx6sabresd/mx6sabresd.env new file mode 100644 index 00000000000..3608e931665 --- /dev/null +++ b/board/nxp/mx6sabresd/mx6sabresd.env @@ -0,0 +1,5 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +console=ttymxc0 + +#include <env/nxp/mx6sabre_common.env> diff --git a/board/nxp/mx6ullevk/mx6ullevk.env b/board/nxp/mx6ullevk/mx6ullevk.env new file mode 100644 index 00000000000..0fce3aaaa4e --- /dev/null +++ b/board/nxp/mx6ullevk/mx6ullevk.env @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +script=boot.scr +image=zImage +console=ttymxc0 +initrd_high=0xffffffff +fdt_file=undefined +fdt_addr=0x83000000 +boot_fdt=try +ip_dyn=yes +videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0 +mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX +mmcpart=1 +mmcroot=/dev/mmcblk1p2 rootwait rw +mmcautodetect=yes +mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} +loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script}; +bootscript=echo Running bootscript from mmc ...; source +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file} +mmcboot=echo Booting from mmc ...; + run mmcargs; + if test ${boot_fdt} = yes || test ${boot_fdt} = try; then + if run loadfdt; then + bootz ${loadaddr} - ${fdt_addr}; + else + if test ${boot_fdt} = try; then + bootz; + else + echo WARN: Cannot load the DT; + fi; + fi; + else + bootz; + fi; +findfdt=if test $fdt_file = undefined; then + if test $board_name = ULZ-EVK && test $board_rev = 14X14; then + setenv fdt_file imx6ulz-14x14-evk.dtb; + fi; + if test $board_name = EVK && test $board_rev = 14X14; then + setenv fdt_file imx6ull-14x14-evk.dtb; + fi; + if test $fdt_file = undefined; then + echo WARNING: Could not determine dtb to use; + fi; + fi; +netargs=setenv bootargs console=${console},${baudrate} root=/dev/nfs + ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp +netboot=echo Booting from net ...; + run netargs; + if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + ${get_cmd} ${image}; + if test ${boot_fdt} = yes || test ${boot_fdt} = try; then + if ${get_cmd} ${fdt_addr} ${fdt_file}; then + bootz ${loadaddr} - ${fdt_addr}; + else + if test ${boot_fdt} = try; then + bootz; + else + echo WARN: Cannot load the DT; + fi; + fi; + else + bootz; + fi; diff --git a/board/nxp/mx7ulp_evk/mx7ulp_evk.env b/board/nxp/mx7ulp_evk/mx7ulp_evk.env new file mode 100644 index 00000000000..f5a384a61de --- /dev/null +++ b/board/nxp/mx7ulp_evk/mx7ulp_evk.env @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +script=boot.scr +image=zImage +console=ttyLP0 +initrd_high=0xffffffff +fdt_file=imx7ulp-evk.dtb +fdt_addr=0x63000000 +boot_fdt=try +earlycon=lpuart32,0x402D0010 +ip_dyn=yes +mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX +mmcpart=1 +mmcroot=/dev/mmcblk0p2 rootwait rw +mmcautodetect=yes +mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} +loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script}; +bootscript=echo Running bootscript from mmc ...; source +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file} +mmcboot=echo Booting from mmc ...; + run mmcargs; + if test ${boot_fdt} = yes || test ${boot_fdt} = try; then + if run loadfdt; then + bootz ${loadaddr} - ${fdt_addr}; + else + if test ${boot_fdt} = try; then + bootz; + else + echo WARN: Cannot load the DT; + fi; + fi; + else + bootz; + fi; +netargs=setenv bootargs console=${console},${baudrate} root=/dev/nfs + ip=:::::eth0:dhcp nfsroot=${serverip}:${nfsroot},v3,tcp +netboot=echo Booting from net ...; + run netargs; + if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + usb start; + ${get_cmd} ${image}; + if test ${boot_fdt} = yes || test ${boot_fdt} = try; then + if ${get_cmd} ${fdt_addr} ${fdt_file}; then + bootz ${loadaddr} - ${fdt_addr}; + else + if test ${boot_fdt} = try; then + bootz; + else + echo WARN: Cannot load the DT; + fi; + fi; + else + bootz; + fi; |