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-rw-r--r--board/socionext/developerbox/Kconfig8
-rw-r--r--board/socionext/developerbox/developerbox.c6
2 files changed, 7 insertions, 7 deletions
diff --git a/board/socionext/developerbox/Kconfig b/board/socionext/developerbox/Kconfig
index c181d26a44a..1b1c9181bad 100644
--- a/board/socionext/developerbox/Kconfig
+++ b/board/socionext/developerbox/Kconfig
@@ -11,10 +11,10 @@ config TARGET_DEVELOPERBOX
select SYS_DISABLE_DCACHE_OPS
select OF_BOARD_SETUP
help
- Choose this option if you build the U-Boot for the DeveloperBox
- 96boards Enterprise Edition.
- This board will booted from SCP firmware and it enables SMMU, thus
- the dcache is updated automatically when DMA operation is executed.
+ Choose this option if you build the U-Boot for the DeveloperBox
+ 96boards Enterprise Edition.
+ This board will booted from SCP firmware and it enables SMMU, thus
+ the dcache is updated automatically when DMA operation is executed.
endchoice
config SYS_SOC
diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c
index 556a9ed527e..a7bd08f69ad 100644
--- a/board/socionext/developerbox/developerbox.c
+++ b/board/socionext/developerbox/developerbox.c
@@ -170,11 +170,11 @@ int dram_init_banksize(void)
struct draminfo_entry *ent = synquacer_draminfo->entry;
int i;
- for (i = 0; i < ARRAY_SIZE(gd->bd->bi_dram); i++) {
+ for (i = 0; i < ARRAY_SIZE(gd->dram); i++) {
if (i < synquacer_draminfo->nr_regions) {
debug("%s: dram[%d] = %llx@%llx\n", __func__, i, ent[i].size, ent[i].base);
- gd->bd->bi_dram[i].start = ent[i].base;
- gd->bd->bi_dram[i].size = ent[i].size;
+ gd->dram[i].start = ent[i].base;
+ gd->dram[i].size = ent[i].size;
}
}