diff options
Diffstat (limited to 'doc/arch')
| -rw-r--r-- | doc/arch/arc.rst | 2 | ||||
| -rw-r--r-- | doc/arch/mips.rst | 2 | ||||
| -rw-r--r-- | doc/arch/nios2.rst | 2 | ||||
| -rw-r--r-- | doc/arch/sh.rst | 1 | ||||
| -rw-r--r-- | doc/arch/x86/manual_boot.rst | 4 | ||||
| -rw-r--r-- | doc/arch/x86/x86.rst | 20 |
6 files changed, 15 insertions, 16 deletions
diff --git a/doc/arch/arc.rst b/doc/arch/arc.rst index f8e04a34f14..18556e5d372 100644 --- a/doc/arch/arc.rst +++ b/doc/arch/arc.rst @@ -8,7 +8,7 @@ that SoC designers can optimize for a wide range of uses, from deeply embedded to high-performance host applications. More information on ARC cores avaialble here: -http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx +https://mips.com/processor-solutions/arc-processors/ Designers can differentiate their products by using patented configuration technology to tailor each ARC processor instance to meet specific performance, diff --git a/doc/arch/mips.rst b/doc/arch/mips.rst index aeb58247943..70d9aa57c38 100644 --- a/doc/arch/mips.rst +++ b/doc/arch/mips.rst @@ -8,7 +8,7 @@ Notes for the MIPS architecture port of U-Boot Toolchains ---------- - * `Buildroot <http://buildroot.uclibc.org/>`_ + * `Buildroot <https://buildroot.org/>`_ * `kernel.org cross-development toolchains <https://mirrors.edge.kernel.org/pub/tools/crosstool/files/bin/x86_64/>`_ Known Issues diff --git a/doc/arch/nios2.rst b/doc/arch/nios2.rst index 90b4ddf387b..a825b244ab7 100644 --- a/doc/arch/nios2.rst +++ b/doc/arch/nios2.rst @@ -10,7 +10,7 @@ Please refer to the link for more information on Nios II: https://www.altera.com/products/processors/overview.html Please refer to the link for Linux port and toolchains: -http://rocketboards.org/foswiki/view/Documentation/NiosIILinuxUserManual +https://rocketboards.org/foswiki/view/Documentation/NiosIILinuxUserManual The Nios II port of u-boot is controlled by device tree. Please check out :doc:`/develop/devicetree/control`. diff --git a/doc/arch/sh.rst b/doc/arch/sh.rst index 3e3759d68b2..87ccab237c4 100644 --- a/doc/arch/sh.rst +++ b/doc/arch/sh.rst @@ -73,7 +73,6 @@ Compiler -------- You can use the following of u-boot to compile. - `SuperH Linux Open site <http://www.superh-linux.org/>`_ - - `KPIT GNU tools <http://www.kpitgnutools.com/>`_ Future ------ diff --git a/doc/arch/x86/manual_boot.rst b/doc/arch/x86/manual_boot.rst index 87ebda2e3dd..649aceef608 100644 --- a/doc/arch/x86/manual_boot.rst +++ b/doc/arch/x86/manual_boot.rst @@ -272,5 +272,5 @@ and change CONFIG_BOOTARGS value in configs/minnowmax_defconfig to:: CONFIG_BOOTARGS="root=/dev/sda2 ro" .. _here: https://en.wikipedia.org/wiki/GUID_Partition_Table -.. _this: http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf -.. _that: http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf +.. _this: http://events.static.linuxfound.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf +.. _that: http://events.static.linuxfound.org/sites/events/files/slides/elce-2014.pdf diff --git a/doc/arch/x86/x86.rst b/doc/arch/x86/x86.rst index f67216d6ce0..9ba5c289337 100644 --- a/doc/arch/x86/x86.rst +++ b/doc/arch/x86/x86.rst @@ -185,14 +185,14 @@ These notes are for those who want to port U-Boot to a new x86 platform. Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment. The Dediprog em100 can be used on Linux. -The em100 tool is available here: http://review.coreboot.org/p/em100.git +The em100 tool is available here: https://review.coreboot.org/admin/repos/em100,general On Minnowboard Max the following command line can be used:: sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r A suitable clip for connecting over the SPI flash chip is here: -http://www.dediprog.com/pd/programmer-accessories/EM-TC-8. +https://www.dediprog.com/product/EM-TC-8. This allows you to override the SPI flash contents for development purposes. Typically you can write to the em100 in around 1200ms, considerably faster @@ -242,7 +242,7 @@ debug serial port may be useful here. See setup_internal_uart() for an example. During the U-Boot porting, one of the important steps is to write correct PIRQ routing information in the board device tree. Without it, device drivers in the Linux kernel won't function correctly due to interrupt is not working. Please -refer to U-Boot `doc <doc/device-tree-bindings/misc/intel,irq-router.txt>`_ for +refer to :download:`intel,irq-router.txt <../../device-tree-bindings/misc/intel,irq-router.txt>` for the device tree bindings of Intel interrupt router. Here we have more details on the intel,pirq-routing property below. @@ -480,10 +480,10 @@ TODO List - Audio - Chrome OS verified boot -.. _coreboot: http://www.coreboot.org -.. _QEMU: http://www.qemu.org -.. _microcode: http://en.wikipedia.org/wiki/Microcode -.. _SFI: http://simplefirmware.org -.. _MP: http://www.intel.com/design/archives/processors/pro/docs/242016.htm -.. _SeaBIOS: http://www.seabios.org/SeaBIOS -.. _ACPI: http://www.acpi.info +.. _coreboot: https://www.coreboot.org +.. _QEMU: https://www.qemu.org +.. _microcode: https://en.wikipedia.org/wiki/Microcode +.. _SFI: https://en.wikipedia.org/wiki/Simple_Firmware_Interface +.. _MP: https://en.wikipedia.org/wiki/MultiProcessor_Specification +.. _SeaBIOS: https://www.seabios.org/ +.. _ACPI: https://uefi.org/acpi/specs |