diff options
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/Kconfig | 9 | ||||
| -rw-r--r-- | drivers/net/Makefile | 1 | ||||
| -rw-r--r-- | drivers/net/dm9000x.c | 6 | ||||
| -rw-r--r-- | drivers/net/dwc_eth_qos.c | 6 | ||||
| -rw-r--r-- | drivers/net/dwc_eth_qos.h | 1 | ||||
| -rw-r--r-- | drivers/net/dwc_eth_qos_sunxi.c | 254 | ||||
| -rw-r--r-- | drivers/net/dwc_eth_xgmac.c | 1 | ||||
| -rw-r--r-- | drivers/net/ftmac100.c | 6 | ||||
| -rw-r--r-- | drivers/net/ks8851_mll.c | 6 | ||||
| -rw-r--r-- | drivers/net/phy/dp83867.c | 18 | ||||
| -rw-r--r-- | drivers/net/phy/phy.c | 29 | ||||
| -rw-r--r-- | drivers/net/rtl8169.c | 103 | ||||
| -rw-r--r-- | drivers/net/smc911x.c | 6 |
13 files changed, 412 insertions, 34 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 4399c6c7a99..faa08e9ebba 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -284,6 +284,15 @@ config DWC_ETH_QOS_STM32 The Synopsys Designware Ethernet QOS IP block with the specific configuration used in STM32MP soc. +config DWC_ETH_QOS_SUNXI + bool "Synopsys DWC Ethernet QOS device support for Allwinner SoCs" + depends on DWC_ETH_QOS && ARCH_SUNXI + select REGMAP + select SUNXI_SYSCON + help + The Synopsys Designware Ethernet QOS IP block with specific + configuration used in Allwinner SoCs. + config DWC_ETH_QOS_TEGRA186 bool "Synopsys DWC Ethernet QOS device support for TEGRA186" depends on DWC_ETH_QOS diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 761f7f0f451..4c1f4094ab2 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_DWC_ETH_QOS_QCOM) += dwc_eth_qos_qcom.o obj-$(CONFIG_DWC_ETH_QOS_ROCKCHIP) += dwc_eth_qos_rockchip.o obj-$(CONFIG_DWC_ETH_QOS_STARFIVE) += dwc_eth_qos_starfive.o obj-$(CONFIG_DWC_ETH_QOS_STM32) += dwc_eth_qos_stm32.o +obj-$(CONFIG_DWC_ETH_QOS_SUNXI) += dwc_eth_qos_sunxi.o obj-$(CONFIG_DWC_ETH_XGMAC) += dwc_eth_xgmac.o obj-$(CONFIG_DWC_ETH_XGMAC_SOCFPGA) += dwc_eth_xgmac_socfpga.o obj-$(CONFIG_E1000) += e1000.o diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c index 9e17f0b9c28..53225979b66 100644 --- a/drivers/net/dm9000x.c +++ b/drivers/net/dm9000x.c @@ -638,11 +638,6 @@ static int dm9000_read_rom_hwaddr(struct udevice *dev) return !is_valid_ethaddr(pdata->enetaddr); } -static int dm9000_bind(struct udevice *dev) -{ - return device_set_name(dev, dev->name); -} - static int dm9000_of_to_plat(struct udevice *dev) { struct dm9000_priv *db = dev_get_priv(dev); @@ -673,7 +668,6 @@ U_BOOT_DRIVER(dm9000) = { .name = "eth_dm9000", .id = UCLASS_ETH, .of_match = dm9000_ids, - .bind = dm9000_bind, .of_to_plat = dm9000_of_to_plat, .ops = &dm9000_ops, .priv_auto = sizeof(struct dm9000_priv), diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index b7e6299c307..e7cf68d011c 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -1665,6 +1665,12 @@ static const struct udevice_id eqos_ids[] = { .data = (ulong)&eqos_mtk_config }, #endif +#if IS_ENABLED(CONFIG_DWC_ETH_QOS_SUNXI) + { + .compatible = "allwinner,sun55i-a523-gmac200", + .data = (ulong)&eqos_sunxi_config + }, +#endif { } }; diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h index 978b848b46e..ccb3c3a1453 100644 --- a/drivers/net/dwc_eth_qos.h +++ b/drivers/net/dwc_eth_qos.h @@ -318,3 +318,4 @@ extern struct eqos_config eqos_stm32mp25_config; extern struct eqos_config eqos_jh7110_config; extern struct eqos_config eqos_adi_config; extern struct eqos_config eqos_mtk_config; +extern struct eqos_config eqos_sunxi_config; diff --git a/drivers/net/dwc_eth_qos_sunxi.c b/drivers/net/dwc_eth_qos_sunxi.c new file mode 100644 index 00000000000..91d871dd271 --- /dev/null +++ b/drivers/net/dwc_eth_qos_sunxi.c @@ -0,0 +1,254 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2017 Corentin Labbe <[email protected]> + * Copyright (C) 2025 Chen-Yu Tsai <[email protected]> + * Copyright (C) 2026 Junhui Liu <[email protected]> + */ + +#include <clk.h> +#include <dm.h> +#include <dm/device.h> +#include <dm/device_compat.h> +#include <linux/bitfield.h> +#include <linux/err.h> +#include <linux/errno.h> +#include <net.h> +#include <phy.h> +#include <power/regulator.h> +#include <regmap.h> +#include <reset.h> +#include <malloc.h> +#include <syscon.h> + +#include "dwc_eth_qos.h" + +#define SYSCON_REG 0x34 + +#define SYSCON_PHY_SELECT BIT(15) /* 1: internal, 0: external */ +/* RMII specific bits */ +#define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */ +/* Generic system control EMAC_CLK bits */ +#define SYSCON_ETXDC_MASK GENMASK(12, 10) +#define SYSCON_ERXDC_MASK GENMASK(9, 5) +/* EMAC PHY Interface Type */ +#define SYSCON_EPIT BIT(2) /* 1: RGMII, 0: MII */ +#define SYSCON_ETCS_MASK GENMASK(1, 0) +#define SYSCON_ETCS_MII 0x0 +#define SYSCON_ETCS_EXT_GMII 0x1 +#define SYSCON_ETCS_INT_GMII 0x2 + +struct sunxi_platform_data { + struct clk_bulk clks; + struct reset_ctl_bulk resets; +}; + +static int sunxi_gmac_set_syscon(struct udevice *dev, + phy_interface_t interface_type) +{ + struct regmap *regmap; + u32 val, reg = 0; + int ret; + + regmap = syscon_regmap_lookup_by_phandle(dev, "syscon"); + if (IS_ERR(regmap)) { + dev_err(dev, "Unable to map syscon\n"); + return PTR_ERR(regmap); + } + + if (!dev_read_u32(dev, "tx-internal-delay-ps", &val)) { + if (val % 100) { + dev_err(dev, "tx-delay must be a multiple of 100\n"); + return -EINVAL; + } + val /= 100; + dev_dbg(dev, "set tx-delay to %x\n", val); + + if (!FIELD_FIT(SYSCON_ETXDC_MASK, val)) { + dev_err(dev, "TX clock delay exceeds maximum\n"); + return -EINVAL; + } + + reg |= FIELD_PREP(SYSCON_ETXDC_MASK, val); + } + + if (!dev_read_u32(dev, "rx-internal-delay-ps", &val)) { + if (val % 100) { + dev_err(dev, "rx-delay must be a multiple of 100\n"); + return -EINVAL; + } + val /= 100; + dev_dbg(dev, "set rx-delay to %x\n", val); + if (!FIELD_FIT(SYSCON_ERXDC_MASK, val)) { + dev_err(dev, "Invalid RX clock delay: %d\n", val); + return -EINVAL; + } + + reg |= FIELD_PREP(SYSCON_ERXDC_MASK, val); + } + + switch (interface_type) { + case PHY_INTERFACE_MODE_MII: + /* default */ + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + reg |= SYSCON_EPIT | SYSCON_ETCS_INT_GMII; + break; + case PHY_INTERFACE_MODE_RMII: + reg |= SYSCON_RMII_EN; + break; + default: + dev_err(dev, "Unsupported interface mode: %s\n", + phy_interface_strings[interface_type]); + return -EINVAL; + } + + ret = regmap_write(regmap, SYSCON_REG, reg); + if (ret < 0) { + dev_err(dev, "Failed to write to syscon\n"); + return ret; + } + + return 0; +} + +static int eqos_start_clks_sunxi(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_plat(dev); + struct sunxi_platform_data *data = pdata->priv_pdata; + + return clk_enable_bulk(&data->clks); +} + +static int eqos_stop_clks_sunxi(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_plat(dev); + struct sunxi_platform_data *data = pdata->priv_pdata; + + return clk_disable_bulk(&data->clks); +} + +static int eqos_start_resets_sunxi(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_plat(dev); + struct sunxi_platform_data *data = pdata->priv_pdata; + int ret; + + ret = reset_deassert_bulk(&data->resets); + if (ret) + return ret; + + return sunxi_gmac_set_syscon(dev, pdata->phy_interface); +} + +static int eqos_stop_resets_sunxi(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_plat(dev); + struct sunxi_platform_data *data = pdata->priv_pdata; + + return reset_assert_bulk(&data->resets); +} + +static int eqos_probe_resources_sunxi(struct udevice *dev) +{ + struct eqos_priv *eqos = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_plat(dev); + struct sunxi_platform_data *data; + struct udevice *phy_supply = NULL; + int ret; + + ret = eqos_get_base_addr_dt(dev); + if (ret) { + dev_err(dev, "Failed to get base address: %d\n", ret); + return ret; + } + + data = calloc(1, sizeof(struct sunxi_platform_data)); + if (!data) + return -ENOMEM; + + pdata->priv_pdata = data; + + pdata->phy_interface = eqos->config->interface(dev); + if (pdata->phy_interface == PHY_INTERFACE_MODE_NA) { + dev_err(dev, "Failed to get PHY interface mode\n"); + return -EINVAL; + } + + ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus); + if (ret) { + dev_err(dev, "Failed to get stmmaceth clock: %d\n", ret); + return ret; + } + + ret = reset_get_bulk(dev, &data->resets); + if (ret) { + dev_err(dev, "Failed to get resets: %d\n", ret); + return ret; + } + + ret = clk_get_bulk(dev, &data->clks); + if (ret) { + dev_err(dev, "Failed to get clocks: %d\n", ret); + return ret; + } + + if (IS_ENABLED(CONFIG_DM_REGULATOR)) { + ret = device_get_supply_regulator(dev, "phy-supply", &phy_supply); + if (ret && ret != -ENOENT) { + dev_err(dev, "Failed to get PHY supply: %d\n", ret); + return ret; + } + + if (phy_supply) { + ret = regulator_set_enable_if_allowed(phy_supply, true); + if (ret) { + dev_err(dev, "Failed to enable phy supply: %d\n", ret); + return ret; + } + } + } + + return 0; +} + +static int eqos_remove_resources_sunxi(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_plat(dev); + struct sunxi_platform_data *data = pdata->priv_pdata; + + reset_assert_bulk(&data->resets); + clk_disable_bulk(&data->clks); + + return 0; +} + +static struct eqos_ops eqos_sunxi_ops = { + .eqos_inval_desc = eqos_inval_desc_generic, + .eqos_flush_desc = eqos_flush_desc_generic, + .eqos_inval_buffer = eqos_inval_buffer_generic, + .eqos_flush_buffer = eqos_flush_buffer_generic, + .eqos_probe_resources = eqos_probe_resources_sunxi, + .eqos_remove_resources = eqos_remove_resources_sunxi, + .eqos_stop_resets = eqos_stop_resets_sunxi, + .eqos_start_resets = eqos_start_resets_sunxi, + .eqos_stop_clks = eqos_stop_clks_sunxi, + .eqos_start_clks = eqos_start_clks_sunxi, + .eqos_calibrate_pads = eqos_null_ops, + .eqos_disable_calibration = eqos_null_ops, + .eqos_set_tx_clk_speed = eqos_null_ops, + .eqos_get_enetaddr = eqos_null_ops, +}; + +struct eqos_config __maybe_unused eqos_sunxi_config = { + .reg_access_always_ok = false, + .mdio_wait = 10, + .swr_wait = 50, + .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB, + .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_150_250, + .axi_bus_width = EQOS_AXI_WIDTH_64, + .interface = dev_read_phy_mode, + .ops = &eqos_sunxi_ops +}; diff --git a/drivers/net/dwc_eth_xgmac.c b/drivers/net/dwc_eth_xgmac.c index 311b57011c3..4e664a88f68 100644 --- a/drivers/net/dwc_eth_xgmac.c +++ b/drivers/net/dwc_eth_xgmac.c @@ -507,6 +507,7 @@ static int xgmac_start(struct udevice *dev) xgmac->config->interface(dev)); if (!xgmac->phy) { pr_err("%s phy_connect() failed\n", dev->name); + ret = -ENODEV; goto err_stop_resets; } diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c index fa0b3dbb6d1..d9826178e82 100644 --- a/drivers/net/ftmac100.c +++ b/drivers/net/ftmac100.c @@ -429,11 +429,6 @@ static int ftmac100_remove(struct udevice *dev) return 0; } -static int ftmac100_bind(struct udevice *dev) -{ - return device_set_name(dev, dev->name); -} - static const struct eth_ops ftmac100_ops = { .start = ftmac100_start, .send = ftmac100_send, @@ -451,7 +446,6 @@ U_BOOT_DRIVER(ftmac100) = { .name = "ftmac100", .id = UCLASS_ETH, .of_match = ftmac100_ids, - .bind = ftmac100_bind, .of_to_plat = ftmac100_of_to_plat, .probe = ftmac100_probe, .remove = ftmac100_remove, diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c index 2c956154d09..c2f87d4222b 100644 --- a/drivers/net/ks8851_mll.c +++ b/drivers/net/ks8851_mll.c @@ -571,11 +571,6 @@ static int ks8851_read_rom_hwaddr(struct udevice *dev) return !is_valid_ethaddr(pdata->enetaddr); } -static int ks8851_bind(struct udevice *dev) -{ - return device_set_name(dev, dev->name); -} - static int ks8851_probe(struct udevice *dev) { struct ks_net *ks = dev_get_priv(dev); @@ -615,7 +610,6 @@ U_BOOT_DRIVER(ks8851) = { .name = "eth_ks8851", .id = UCLASS_ETH, .of_match = ks8851_ids, - .bind = ks8851_bind, .of_to_plat = ks8851_of_to_plat, .probe = ks8851_probe, .ops = &ks8851_ops, diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index ebed61de133..34c871857e1 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -126,6 +126,22 @@ struct dp83867_private { bool sgmii_ref_clk_en; }; +static int dp83867_phy_extread(struct phy_device *phydev, + int addr, int devad, int reg) +{ + if (devad != DP83867_DEVADDR) + return -EINVAL; + return phy_read_mmd(phydev, devad, addr); +}; + +static int dp83867_phy_extwrite(struct phy_device *phydev, int addr, + int devad, int reg, u16 val) +{ + if (devad != DP83867_DEVADDR) + return -EINVAL; + return phy_write_mmd(phydev, devad, addr, (u32)val); +}; + static int dp83867_config_port_mirroring(struct phy_device *phydev) { struct dp83867_private *dp83867 = @@ -410,4 +426,6 @@ U_BOOT_PHY_DRIVER(dp83867) = { .config = &dp83867_config, .startup = &genphy_startup, .shutdown = &genphy_shutdown, + .readext = dp83867_phy_extread, + .writeext = dp83867_phy_extwrite, }; diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index d7e0c4fe02d..f2e9b2a9820 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -20,6 +20,7 @@ #include <asm-generic/gpio.h> #include <dm/device_compat.h> #include <dm/of_extra.h> +#include <dm/uclass-internal.h> #include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> @@ -921,6 +922,27 @@ static struct phy_device *phy_connect_fixed(struct mii_dev *bus, } #endif +#ifdef CONFIG_DM_ETH_PHY +static struct phy_device *phy_connect_dm_bound(struct mii_dev *bus, + struct udevice *dev, + uint mask) +{ + struct udevice *dm_phy_dev; + struct phy_device *phydev; + + if (!uclass_find_device_by_phandle(UCLASS_ETH_PHY, dev, + "phy-handle", &dm_phy_dev)) { + phydev = phy_find_by_mask(bus, mask); + if (phydev) + phydev->node = dev_ofnode(dm_phy_dev); + + return phydev; + } + + return NULL; +} +#endif + struct phy_device *phy_connect(struct mii_dev *bus, int addr, struct udevice *dev, phy_interface_t interface) @@ -928,8 +950,13 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr, struct phy_device *phydev = NULL; uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff; +#ifdef CONFIG_DM_ETH_PHY + phydev = phy_connect_dm_bound(bus, dev, mask); +#endif + #ifdef CONFIG_PHY_FIXED - phydev = phy_connect_fixed(bus, dev); + if (!phydev) + phydev = phy_connect_fixed(bus, dev); #endif #ifdef CONFIG_PHY_NCSI diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index e203faed26b..0208ff2d435 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -49,6 +49,7 @@ #include <asm/cache.h> #include <asm/io.h> #include <pci.h> +#include <linux/bitops.h> #include <linux/delay.h> #include <linux/printk.h> @@ -152,8 +153,24 @@ enum RTL8125_registers { IntrMask_8125 = 0x38, IntrStatus_8125 = 0x3C, TxPoll_8125 = 0x90, + RX_DESC_MODE = 0xd8, + MACOCP = 0xb0, + RADMFIFO_PROTECT = 0x0402, + TX_DESC_MODE = 0xeb58, }; +/* MAC OCP indirect access via the MACOCP register */ +#define RTL8125_OCP_WRITE 0x80000000 +#define RTL8125_OCP_ADDR_SHIFT 16 +#define RX_DESC_CRC_DROP BIT(0) +#define RX_DESC_TYPE BIT(1) + +/* TX_DESC_MODE (MAC OCP 0xeb58): TX descriptor format select, bits [1:0] */ +#define TX_DESC_FMT_MASK GENMASK(1, 0) +#define TX_DESC_FMT_STD BIT(0) +#define TX_DESC_FMT_V3 BIT(1) +#define RX_PAUSE_SLOT_ON BIT(11) + enum RTL8169_register_content { /*InterruptStatusBits */ SYSErr = 0x8000, @@ -271,6 +288,8 @@ static struct { {"RTL-8168h/8111h", 0x54, 0xff7e1880,}, {"RTL-8125B", 0x64, 0xff7e1880,}, {"RTL-8125d", 0x6a, 0xff7e5880,}, + {"RTL-8126A", 0x66, 0xff7e5880,}, + {"RTL-8127A", 0x6e, 0xff7e5880,}, }; enum _DescStatusBit { @@ -355,6 +374,8 @@ static const unsigned int rtl8169_rx_config = static struct pci_device_id supported[] = { { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8125) }, + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8126) }, + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8127) }, { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8161) }, { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8167) }, { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168) }, @@ -398,6 +419,33 @@ int mdio_read(int RegAddr) return value; } +/* RTL8125/8126/8127 share the same register layout and quirks */ +static bool rtl_is_8125(struct pci_child_plat *pplat) +{ + return pplat->device == 0x8125 || pplat->device == 0x8126 || + pplat->device == 0x8127; +} + +static void rtl_mac_ocp_write(u16 reg_addr, u16 value) +{ + u32 data32; + + data32 = (u32)(reg_addr / 2) << RTL8125_OCP_ADDR_SHIFT; + data32 += value; + data32 |= RTL8125_OCP_WRITE; + RTL_W32(MACOCP, data32); +} + +static u16 rtl_mac_ocp_read(u16 reg_addr) +{ + u32 data32; + + data32 = (u32)(reg_addr / 2) << RTL8125_OCP_ADDR_SHIFT; + RTL_W32(MACOCP, data32); + + return (u16)RTL_R32(MACOCP); +} + static int rtl8169_init_board(unsigned long dev_iobase, const char *name) { int i; @@ -571,12 +619,15 @@ static int rtl_recv_common(struct udevice *dev, unsigned long dev_iobase, return length; } else { - u32 IntrStatus = IntrStatus_8169; + u32 sts; - if (pplat->device == 0x8125) - IntrStatus = IntrStatus_8125; - ushort sts = RTL_R8(IntrStatus); - RTL_W8(IntrStatus, sts & ~(TxErr | RxErr | SYSErr)); + if (rtl_is_8125(pplat)) { + sts = RTL_R32(IntrStatus_8125); + RTL_W32(IntrStatus_8125, sts & ~(TxErr | RxErr | SYSErr)); + } else { + sts = RTL_R16(IntrStatus_8169); + RTL_W16(IntrStatus_8169, sts & ~(TxErr | RxErr | SYSErr)); + } udelay(100); /* wait */ } tpc->cur_rx = cur_rx; @@ -636,8 +687,8 @@ static int rtl_send_common(struct udevice *dev, unsigned long dev_iobase, ((len > ETH_ZLEN) ? len : ETH_ZLEN)); } rtl_flush_tx_desc(&tpc->TxDescArray[entry]); - if (pplat->device == 0x8125) - RTL_W8(TxPoll_8125, 0x1); /* set polling bit */ + if (rtl_is_8125(pplat)) + RTL_W32(TxPoll_8125, 0x1); /* set polling bit */ else RTL_W8(TxPoll_8169, 0x40); /* set polling bit */ @@ -697,6 +748,8 @@ static void rtl8169_set_rx_mode(void) static void rtl8169_hw_start(struct udevice *dev) { + u8 version = rtl_chip_info[tpc->chipset].version; + u16 tx_desc_mode; u32 i; #ifdef DEBUG_RTL8169 @@ -719,6 +772,36 @@ static void rtl8169_hw_start(struct udevice *dev) RTL_W8(Cfg9346, Cfg9346_Unlock); + /* + * RTL8125D/8126A/8127A require explicit descriptor-type and CRC-drop setup. + * RTL8125B (0x64) is intentionally excluded to avoid regressing working hardware. + */ + switch (version) { + case 0x6a: + case 0x66: + case 0x6e: + /* Reg 0xD8: Disable CRC drop and force legacy 16-byte RX desc */ + RTL_W8(RX_DESC_MODE, RTL_R8(RX_DESC_MODE) & ~(RX_DESC_CRC_DROP | RX_DESC_TYPE)); + + /* RxConfig 0x44: enable RX pause slot (RTL8125B and later) */ + RTL_W32(RxConfig, RTL_R32(RxConfig) | RX_PAUSE_SLOT_ON); + + /* MAC OCP 0xEB58: TX descriptor format setup */ + tx_desc_mode = rtl_mac_ocp_read(TX_DESC_MODE) & ~TX_DESC_FMT_MASK; + + if (version == 0x6e) { + /* RTL8127A specific: Tx desc V3 and RADM FIFO protection */ + rtl_mac_ocp_write(TX_DESC_MODE, tx_desc_mode | TX_DESC_FMT_V3); + RTL_W16(RADMFIFO_PROTECT, 0x2001); + } else { + /* RTL8125D / RTL8126A specific: standard Tx desc */ + rtl_mac_ocp_write(TX_DESC_MODE, tx_desc_mode | TX_DESC_FMT_STD); + } + break; + default: + break; + } + /* RTL-8169sb/8110sb or previous version */ if (tpc->chipset <= 5) RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); @@ -860,8 +943,8 @@ static void rtl_halt_common(struct udevice *dev) RTL_W8(ChipCmd, 0x00); /* Disable interrupts by clearing the interrupt mask. */ - if (pplat->device == 0x8125) - RTL_W16(IntrMask_8125, 0x0000); + if (rtl_is_8125(pplat)) + RTL_W32(IntrMask_8125, 0x00000000); else RTL_W16(IntrMask_8169, 0x0000); @@ -1052,6 +1135,8 @@ static int rtl8169_eth_probe(struct udevice *dev) switch (pplat->device) { case 0x8125: + case 0x8126: + case 0x8127: case 0x8161: case 0x8168: region = 2; diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index f39ba40944f..2835eb45856 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -431,11 +431,6 @@ static int smc911x_read_rom_hwaddr(struct udevice *dev) return 0; } -static int smc911x_bind(struct udevice *dev) -{ - return device_set_name(dev, dev->name); -} - static int smc911x_probe(struct udevice *dev) { struct smc911x_priv *priv = dev_get_priv(dev); @@ -487,7 +482,6 @@ U_BOOT_DRIVER(smc911x) = { .name = "eth_smc911x", .id = UCLASS_ETH, .of_match = smc911x_ids, - .bind = smc911x_bind, .of_to_plat = smc911x_of_to_plat, .probe = smc911x_probe, .ops = &smc911x_ops, |