summaryrefslogtreecommitdiff
path: root/drivers/phy
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/cadence/phy-cadence-sierra.c13
-rw-r--r--drivers/phy/cadence/phy-cadence-torrent.c1
-rw-r--r--drivers/phy/marvell/comphy_core.c4
-rw-r--r--drivers/phy/marvell/comphy_core.h4
4 files changed, 8 insertions, 14 deletions
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c
index 2c9d5a12127..bd7ab9d1b77 100644
--- a/drivers/phy/cadence/phy-cadence-sierra.c
+++ b/drivers/phy/cadence/phy-cadence-sierra.c
@@ -225,11 +225,6 @@ static const struct reg_field pllctrl_lock =
static const struct reg_field phy_iso_link_ctrl_1 =
REG_FIELD(SIERRA_PHY_ISO_LINK_CTRL, 1, 1);
-static const char * const clk_names[] = {
- [CDNS_SIERRA_PLL_CMNLC] = "pll_cmnlc",
- [CDNS_SIERRA_PLL_CMNLC1] = "pll_cmnlc1",
-};
-
enum cdns_sierra_cmn_plllc {
CMN_PLLLC,
CMN_PLLLC1,
@@ -602,7 +597,7 @@ static int cdns_sierra_pll_bind_of_clocks(struct cdns_sierra_phy *sp)
struct udevice *dev = sp->dev;
struct driver *cdns_sierra_clk_drv;
struct cdns_sierra_pll_mux_sel *data = pll_clk_mux_sel;
- int i, rc;
+ int rc;
cdns_sierra_clk_drv = lists_driver_lookup_name("cdns_sierra_mux_clk");
if (!cdns_sierra_clk_drv) {
@@ -612,10 +607,8 @@ static int cdns_sierra_pll_bind_of_clocks(struct cdns_sierra_phy *sp)
rc = device_bind(dev, cdns_sierra_clk_drv, "pll_mux_clk",
data, dev_ofnode(dev), NULL);
- if (rc) {
- dev_err(dev, "cannot bind driver for clock %s\n",
- clk_names[i]);
- }
+ if (rc)
+ dev_err(dev, "cannot bind driver for clock pll_mux_clk\n");
return 0;
}
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
index 1f566d082f9..28fe026223c 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -719,6 +719,7 @@ static int cdns_torrent_phy_probe(struct udevice *dev)
if (total_num_lanes > MAX_NUM_LANES) {
dev_err(dev, "Invalid lane configuration\n");
+ ret = -EINVAL;
goto put_lnk_rst;
}
diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c
index a666a4e794e..a4121423873 100644
--- a/drivers/phy/marvell/comphy_core.c
+++ b/drivers/phy/marvell/comphy_core.c
@@ -28,7 +28,7 @@ static const char *get_speed_string(u32 speed)
"10.3125 Gbps"
};
- if (speed < 0 || speed > COMPHY_SPEED_MAX)
+ if (speed < 0 || speed >= COMPHY_SPEED_MAX)
return "invalid";
return speed_strings[speed];
@@ -44,7 +44,7 @@ static const char *get_type_string(u32 type)
"IGNORE"
};
- if (type < 0 || type > COMPHY_TYPE_MAX)
+ if (type < 0 || type >= COMPHY_TYPE_MAX)
return "invalid";
return type_strings[type];
diff --git a/drivers/phy/marvell/comphy_core.h b/drivers/phy/marvell/comphy_core.h
index f3d04939387..086a4d82f26 100644
--- a/drivers/phy/marvell/comphy_core.h
+++ b/drivers/phy/marvell/comphy_core.h
@@ -47,8 +47,8 @@ struct chip_serdes_phy_config {
int (*rx_training)(struct chip_serdes_phy_config *, u32);
void __iomem *comphy_base_addr;
void __iomem *hpipe3_base_addr;
- u32 comphy_lanes_count;
- u32 comphy_mux_bitcount;
+ int comphy_lanes_count;
+ int comphy_mux_bitcount;
const fdt32_t *comphy_mux_lane_order;
u32 cp_index;
struct comphy_map comphy_map_data[MAX_LANE_OPTIONS];