summaryrefslogtreecommitdiff
path: root/include/configs/p1_p2_rdb_pc.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/configs/p1_p2_rdb_pc.h')
-rw-r--r--include/configs/p1_p2_rdb_pc.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 6e8ac1b98df..14d702e1efe 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -125,13 +125,13 @@
#define SPD_EEPROM_ADDRESS 0x52
#if defined(CONFIG_TARGET_P1020RDB_PD)
-#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G
+#define CFG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G
#else
-#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G
+#define CFG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G
#endif
-#define CONFIG_SYS_SDRAM_SIZE (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
+#define CFG_SYS_SDRAM_SIZE (1u << (CFG_SYS_SDRAM_SIZE_LAW - 19))
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
+#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
/* Default settings for DDR3 */
#ifndef CONFIG_TARGET_P2020RDB