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-rw-r--r--include/configs/MPC837XERDB.h27
-rw-r--r--include/configs/MPC8548CDS.h27
-rw-r--r--include/configs/P1010RDB.h31
-rw-r--r--include/configs/ls1021aiot.h21
-rw-r--r--include/configs/ls1021aqds.h26
-rw-r--r--include/configs/p1_p2_rdb_pc.h21
-rw-r--r--include/configs/socrates.h16
-rw-r--r--include/tsec.h60
8 files changed, 0 insertions, 229 deletions
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 95a90199a42..f312ffb37e2 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -41,8 +41,6 @@
#ifdef CONFIG_VSC7385_ENET
-#define CONFIG_TSEC2
-
/* The flash address and size of the VSC7385 firmware image */
#define CONFIG_VSC7385_IMAGE 0xFE7FE000
#define CONFIG_VSC7385_IMAGE_SIZE 8192
@@ -178,31 +176,6 @@
#define CFG_SYS_PCIE2_MEM_PHYS 0xC8000000
#define CFG_SYS_PCIE2_IO_PHYS 0xD8000000
-/*
- * TSEC
- */
-#ifdef CONFIG_TSEC_ENET
-
-#define CONFIG_GMII /* MII PHY management */
-
-#define CONFIG_TSEC1
-
-#ifdef CONFIG_TSEC1
-#define CONFIG_TSEC1_NAME "TSEC0"
-#define CFG_SYS_TSEC1_OFFSET 0x24000
-#define TSEC1_PHY_ADDR 2
-#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC1_PHYIDX 0
-#endif
-
-#ifdef CONFIG_TSEC2
-#define CONFIG_TSEC2_NAME "TSEC1"
-#define TSEC2_PHY_ADDR 0x1c
-#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC2_PHYIDX 0
-#endif
-#endif
-
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC_PIN_MUX
#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC83xx_ESDHC_ADDR
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 780ee5ae865..34b876f829e 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -283,33 +283,6 @@
#endif
#define CFG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */
-#if defined(CONFIG_TSEC_ENET)
-
-#define CONFIG_TSEC1 1
-#define CONFIG_TSEC1_NAME "eTSEC0"
-#define CONFIG_TSEC2 1
-#define CONFIG_TSEC2_NAME "eTSEC1"
-#define CONFIG_TSEC3 1
-#define CONFIG_TSEC3_NAME "eTSEC2"
-#define CONFIG_TSEC4
-#define CONFIG_TSEC4_NAME "eTSEC3"
-#undef CONFIG_MPC85XX_FEC
-
-#define TSEC1_PHY_ADDR 0
-#define TSEC2_PHY_ADDR 1
-#define TSEC3_PHY_ADDR 2
-#define TSEC4_PHY_ADDR 3
-
-#define TSEC1_PHYIDX 0
-#define TSEC2_PHYIDX 0
-#define TSEC3_PHYIDX 0
-#define TSEC4_PHYIDX 0
-#define TSEC1_FLAGS TSEC_GIGABIT
-#define TSEC2_FLAGS TSEC_GIGABIT
-#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#endif /* CONFIG_TSEC_ENET */
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index b1d6b15811d..4418d516956 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -349,37 +349,6 @@ extern unsigned long get_sdram_size(void);
/* eSPI - Enhanced SPI */
#endif
-#if defined(CONFIG_TSEC_ENET)
-#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
-#define CONFIG_TSEC1 1
-#define CONFIG_TSEC1_NAME "eTSEC1"
-#define CONFIG_TSEC2 1
-#define CONFIG_TSEC2_NAME "eTSEC2"
-#define CONFIG_TSEC3 1
-#define CONFIG_TSEC3_NAME "eTSEC3"
-
-#define TSEC1_PHY_ADDR 1
-#define TSEC2_PHY_ADDR 0
-#define TSEC3_PHY_ADDR 2
-
-#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-
-#define TSEC1_PHYIDX 0
-#define TSEC2_PHYIDX 0
-#define TSEC3_PHYIDX 0
-
-/* TBI PHY configuration for SGMII mode */
-#define CONFIG_TSEC_TBICR_SETTINGS ( \
- TBICR_PHY_RESET \
- | TBICR_ANEG_ENABLE \
- | TBICR_FULL_DUPLEX \
- | TBICR_SPEED1_SET \
- )
-
-#endif /* CONFIG_TSEC_ENET */
-
#ifdef CONFIG_MMC
#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR
#endif
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 024a7185275..179c5128e3b 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -66,27 +66,6 @@
/* SPI */
-/*
- * eTSEC
- */
-
-#ifdef CONFIG_TSEC_ENET
-#define CONFIG_MII_DEFAULT_TSEC 1
-#define CONFIG_TSEC1 1
-#define CONFIG_TSEC1_NAME "eTSEC1"
-#define CONFIG_TSEC2 1
-#define CONFIG_TSEC2_NAME "eTSEC2"
-
-#define TSEC1_PHY_ADDR 1
-#define TSEC2_PHY_ADDR 3
-
-#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-
-#define TSEC1_PHYIDX 0
-#define TSEC2_PHYIDX 0
-#endif
-
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
#define CONFIG_PEN_ADDR_BIG_ENDIAN
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 5a91cc3efec..d6681e85987 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -247,32 +247,6 @@
* MMC
*/
-/*
- * eTSEC
- */
-
-#ifdef CONFIG_TSEC_ENET
-#define CONFIG_MII_DEFAULT_TSEC 3
-#define CONFIG_TSEC1 1
-#define CONFIG_TSEC1_NAME "eTSEC1"
-#define CONFIG_TSEC2 1
-#define CONFIG_TSEC2_NAME "eTSEC2"
-#define CONFIG_TSEC3 1
-#define CONFIG_TSEC3_NAME "eTSEC3"
-
-#define TSEC1_PHY_ADDR 1
-#define TSEC2_PHY_ADDR 2
-#define TSEC3_PHY_ADDR 3
-
-#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-
-#define TSEC1_PHYIDX 0
-#define TSEC2_PHYIDX 0
-#define TSEC3_PHYIDX 0
-#endif
-
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 9738e9fa9cb..49c5aef3059 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -366,27 +366,6 @@
#endif
#endif /* CONFIG_PCI */
-#if defined(CONFIG_TSEC_ENET)
-#define CONFIG_TSEC1
-#define CONFIG_TSEC1_NAME "eTSEC1"
-#define CONFIG_TSEC2
-#define CONFIG_TSEC2_NAME "eTSEC2"
-#define CONFIG_TSEC3
-#define CONFIG_TSEC3_NAME "eTSEC3"
-
-#define TSEC1_PHY_ADDR 2
-#define TSEC2_PHY_ADDR 0
-#define TSEC3_PHY_ADDR 1
-
-#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
-
-#define TSEC1_PHYIDX 0
-#define TSEC2_PHYIDX 0
-#define TSEC3_PHYIDX 0
-#endif /* CONFIG_TSEC_ENET */
-
/*
* Environment
*/
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 95393d3ab25..2a076716023 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -111,22 +111,6 @@
#define CFG_SYS_PCI1_MEM_PHYS 0x80000000
#define CFG_SYS_PCI1_IO_PHYS 0xE2000000
-#define CONFIG_TSEC1 1
-#define CONFIG_TSEC1_NAME "TSEC0"
-#define CONFIG_TSEC3 1
-#define CONFIG_TSEC3_NAME "TSEC1"
-#undef CONFIG_MPC85XX_FEC
-
-#define TSEC1_PHY_ADDR 0
-#define TSEC3_PHY_ADDR 1
-
-#define TSEC1_PHYIDX 0
-#define TSEC3_PHYIDX 0
-#define TSEC1_FLAGS TSEC_GIGABIT
-#define TSEC3_FLAGS TSEC_GIGABIT
-
-/* Options are: TSEC[0,1] */
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/tsec.h b/include/tsec.h
index de279b21171..153337837a9 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -19,56 +19,6 @@
#define TSEC_MDIO_REGS_OFFSET 0x520
-#ifndef CONFIG_DM_ETH
-
-#ifdef CONFIG_ARCH_LS1021A
-#define TSEC_SIZE 0x40000
-#define TSEC_MDIO_OFFSET 0x40000
-#else
-#define TSEC_SIZE 0x01000
-#define TSEC_MDIO_OFFSET 0x01000
-#endif
-
-#define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + TSEC_MDIO_REGS_OFFSET)
-
-#define TSEC_GET_REGS(num, offset) \
- (struct tsec __iomem *)\
- (TSEC_BASE_ADDR + (((num) - 1) * (offset)))
-
-#define TSEC_GET_REGS_BASE(num) \
- TSEC_GET_REGS((num), TSEC_SIZE)
-
-#define TSEC_GET_MDIO_REGS(num, offset) \
- (struct tsec_mii_mng __iomem *)\
- (CONFIG_SYS_MDIO_BASE_ADDR + ((num) - 1) * (offset))
-
-#define TSEC_GET_MDIO_REGS_BASE(num) \
- TSEC_GET_MDIO_REGS((num), TSEC_MDIO_OFFSET)
-
-#define DEFAULT_MII_NAME "FSL_MDIO"
-
-#define STD_TSEC_INFO(num) \
-{ \
- .regs = TSEC_GET_REGS_BASE(num), \
- .miiregs_sgmii = TSEC_GET_MDIO_REGS_BASE(num), \
- .devname = CONFIG_TSEC##num##_NAME, \
- .phyaddr = TSEC##num##_PHY_ADDR, \
- .flags = TSEC##num##_FLAGS, \
- .mii_devname = DEFAULT_MII_NAME \
-}
-
-#define SET_STD_TSEC_INFO(x, num) \
-{ \
- x.regs = TSEC_GET_REGS_BASE(num); \
- x.miiregs_sgmii = TSEC_GET_MDIO_REGS_BASE(num); \
- x.devname = CONFIG_TSEC##num##_NAME; \
- x.phyaddr = TSEC##num##_PHY_ADDR; \
- x.flags = TSEC##num##_FLAGS;\
- x.mii_devname = DEFAULT_MII_NAME;\
-}
-
-#endif /* CONFIG_DM_ETH */
-
#define MAC_ADDR_LEN 6
/* #define TSEC_TIMEOUT 1000000 */
@@ -414,11 +364,7 @@ struct tsec_private {
u32 flags;
uint rx_idx; /* index of the current RX buffer */
uint tx_idx; /* index of the current TX buffer */
-#ifndef CONFIG_DM_ETH
- struct eth_device *dev;
-#else
struct udevice *dev;
-#endif
};
struct tsec_info_struct {
@@ -431,10 +377,4 @@ struct tsec_info_struct {
u32 flags;
};
-#ifndef CONFIG_DM_ETH
-int tsec_standard_init(struct bd_info *bis);
-int tsec_eth_init(struct bd_info *bis, struct tsec_info_struct *tsec_info,
- int num);
-#endif
-
#endif /* __TSEC_H */
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-14 03:41:24 +0000