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-rw-r--r--include/configs/P2041RDB.h2
-rw-r--r--include/configs/T208xQDS.h3
-rw-r--r--include/configs/T208xRDB.h9
-rw-r--r--include/configs/T4240RDB.h3
-rw-r--r--include/configs/km/pg-wcom-ls102xa.h17
-rw-r--r--include/configs/kontron_sl28.h5
-rw-r--r--include/configs/ls1012a2g5rdb.h13
-rw-r--r--include/configs/ls1012a_common.h4
-rw-r--r--include/configs/ls1012afrdm.h6
-rw-r--r--include/configs/ls1012afrwy.h13
-rw-r--r--include/configs/ls1012aqds.h12
-rw-r--r--include/configs/ls1012ardb.h14
-rw-r--r--include/configs/ls1028a_common.h7
-rw-r--r--include/configs/ls1043a_common.h9
-rw-r--r--include/configs/ls1046a_common.h9
-rw-r--r--include/configs/ls1088aqds.h3
-rw-r--r--include/configs/ls1088ardb.h7
-rw-r--r--include/configs/ls2080aqds.h7
-rw-r--r--include/configs/ls2080ardb.h7
-rw-r--r--include/configs/lx2160a_common.h7
-rw-r--r--include/configs/pg-wcom-expu1.h53
-rw-r--r--include/net/pfe_eth/pfe/pfe_hw.h6
22 files changed, 113 insertions, 103 deletions
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 3895c2d0c73..715154a0ddf 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -92,7 +92,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* DDR Setup
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index b1acb564c32..7bc792b8d19 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2011-2013 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
/*
@@ -618,7 +618,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
/*
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index e467ef453d2..9449e30bfca 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
/*
@@ -537,8 +537,12 @@ unsigned long get_board_ddr_clk(void);
#define RGMII_PHY2_ADDR 0x02
#define CORTINA_PHY_ADDR1 0x0c /* Cortina CS4315 */
#define CORTINA_PHY_ADDR2 0x0d
-#define FM1_10GEC3_PHY_ADDR 0x00 /* Aquantia AQ1202 10G Base-T */
+/* Aquantia AQ1202 10G Base-T used by board revisions up to C */
+#define FM1_10GEC3_PHY_ADDR 0x00
#define FM1_10GEC4_PHY_ADDR 0x01
+/* Aquantia AQR113C 10G Base-T used by board revisions D and up */
+#define AQR113C_PHY_ADDR1 0x00
+#define AQR113C_PHY_ADDR2 0x08
#endif
#ifdef CONFIG_FMAN_ENET
@@ -574,7 +578,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
/*
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index a04d9137b32..139beae08db 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
/*
@@ -585,7 +585,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index 3d7519c9354..eb480a34a67 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -21,6 +21,10 @@
#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
+#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + \
+ CONFIG_KM_PHRAM + \
+ CONFIG_KM_RESERVED_PRAM) >> 10)
+
#define CONFIG_SYS_CLK_FREQ 66666666
/*
* Take into account default implementation where DDR_FDBK_MULTI is consider as
@@ -43,6 +47,10 @@
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x54
+/* POST memory regions test */
+#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS)
+#define CONFIG_POST_EXTERNAL_WORD_FUNCS
+
/*
* IFC Definitions
*/
@@ -206,7 +214,7 @@
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
-#define COUNTER_FREQUENCY 12500000
+#define COUNTER_FREQUENCY 8333333
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256
@@ -280,10 +288,17 @@
"protect on " __stringify(ENV_DEL_ADDR) \
" +" __stringify(CONFIG_ENV_TOTAL_SIZE) "\0"
+#define CONFIG_HW_ENV_SETTINGS \
+ "hwconfig=devdis:esdhc,usb3,usb2,sata,sec,dcu,duart2,qspi," \
+ "can1,can2_4,ftm2_8,i2c2_3,sai1_4,lpuart2_6," \
+ "asrc,spdif,lpuart1,ftm1\0"
+
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_KM_NEW_ENV \
CONFIG_KM_DEF_ENV \
+ CONFIG_HW_ENV_SETTINGS \
"EEprom_ivm=pca9547:70:9\0" \
+ "ethrotate=no\0" \
""
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index 5f11205802e..bfb4e67c8f4 100644
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -56,11 +56,6 @@
#define CONFIG_DDR_CLK_FREQ 100000000
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
/* ethernet */
#define CONFIG_SYS_RX_ETH_BUFFER 8
diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index 9962b9872af..44f9da73063 100644
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2017 NXP
+ * Copyright 2017, 2021 NXP
*/
#ifndef __LS1012A2G5RDB_H__
@@ -13,11 +13,6 @@
#define CONFIG_CHIP_SELECTS_PER_CTRL 1
#define CONFIG_SYS_SDRAM_SIZE 0x40000000
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
/* SATA */
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
@@ -72,7 +67,7 @@
"installer=load mmc 0:2 $load_addr " \
"/flex_installer_arm64.itb; " \
"bootm $load_addr#$board\0" \
- "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \
+ "qspi_bootcmd=echo Trying load from qspi..;" \
"sf probe && sf read $load_addr " \
"$kernel_addr $kernel_size; env exists secureboot " \
"&& sf read $kernelheader_addr_r $kernelheader_addr " \
@@ -82,11 +77,11 @@
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
#undef QSPI_NOR_BOOTCOMMAND
-#define QSPI_NOR_BOOTCOMMAND "pfe stop;run distro_bootcmd; run qspi_bootcmd; " \
+#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;"
#else
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_BOOTCOMMAND "pfe stop;run distro_bootcmd; run qspi_bootcmd; " \
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;"
#endif
#endif
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index a908b0acb09..6f55acc7db1 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -102,11 +102,11 @@
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
-#define QSPI_NOR_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\
+#define QSPI_NOR_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
"$kernel_start $kernel_size && "\
"bootm $kernel_load"
#else
-#define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\
+#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
"$kernel_start $kernel_size && "\
"bootm $kernel_load"
#endif
diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index 02dd59892bc..2711f651d71 100644
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -50,16 +50,16 @@
"installer=load usb 0:2 $load_addr " \
"/flex_installer_arm64.itb; " \
"bootm $load_addr#$board\0" \
- "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \
+ "qspi_bootcmd=echo Trying load from qspi..;" \
"sf probe && sf read $load_addr " \
"$kernel_addr $kernel_size && bootm $load_addr#$board\0"
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
#undef QSPI_NOR_BOOTCOMMAND
-#define QSPI_NOR_BOOTCOMMAND "pfe stop;run distro_bootcmd;run qspi_bootcmd"
+#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd"
#else
-#define CONFIG_BOOTCOMMAND "pfe stop;run distro_bootcmd;run qspi_bootcmd"
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd"
#endif
#endif /* __LS1012ARDB_H__ */
diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index ba152834d5a..f8b386125cc 100644
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2018 NXP
+ * Copyright 2018, 2021 NXP
*/
#ifndef __LS1012AFRWY_H__
@@ -33,11 +33,6 @@
func(DHCP, dhcp, na)
#endif
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCI_SCAN_SHOW
@@ -89,7 +84,7 @@
"env exists secureboot " \
"&& esbc_validate ${scripthdraddr};" \
"source ${scriptaddr}\0" \
- "sd_bootcmd=pfe stop; echo Trying load from sd card..;" \
+ "sd_bootcmd=echo Trying load from sd card..;" \
"mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd ;" \
"env exists secureboot && mmc read $kernelheader_addr_r "\
@@ -100,10 +95,10 @@
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
#undef QSPI_NOR_BOOTCOMMAND
-#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\
+#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "\
"env exists secureboot && esbc_halt;"
#else
-#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "\
"env exists secureboot && esbc_halt;"
#endif
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index 36be8f42c97..3e5fdadc40d 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2021 NXP
*/
#ifndef __LS1012AQDS_H__
@@ -93,11 +94,6 @@
DSPI_CTAR_DT(0))
#define CONFIG_SPI_FLASH_EON /* cs3 */
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCI_SCAN_SHOW
@@ -140,7 +136,7 @@
"env exists secureboot " \
"&& esbc_validate ${scripthdraddr};" \
"source ${scriptaddr}\0" \
- "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \
+ "qspi_bootcmd=echo Trying load from qspi..;" \
"sf probe 0:0 && sf read $load_addr " \
"$kernel_addr $kernel_size; env exists secureboot " \
"&& sf read $kernelheader_addr_r $kernelheader_addr " \
@@ -150,10 +146,10 @@
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
#undef QSPI_NOR_BOOTCOMMAND
-#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
+#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\
"env exists secureboot && esbc_halt;"
#else
-#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\
"env exists secureboot && esbc_halt;"
#endif
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 582945b2ab1..c8a2f120dca 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
* Copyright 2016 Freescale Semiconductor, Inc.
*/
@@ -38,12 +38,6 @@
#define __PHY_ETH2_MASK 0xFB
#define __PHY_ETH1_MASK 0xFD
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
-
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCI_SCAN_SHOW
@@ -91,7 +85,7 @@
"installer=load mmc 0:2 $load_addr " \
"/flex_installer_arm64.itb; " \
"bootm $load_addr#$board\0" \
- "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \
+ "qspi_bootcmd=echo Trying load from qspi..;" \
"sf probe && sf read $load_addr " \
"$kernel_addr $kernel_size; env exists secureboot " \
"&& sf read $kernelheader_addr_r $kernelheader_addr " \
@@ -101,10 +95,10 @@
#undef CONFIG_BOOTCOMMAND
#ifdef CONFIG_TFABOOT
#undef QSPI_NOR_BOOTCOMMAND
-#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
+#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\
"env exists secureboot && esbc_halt;"
#else
-#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\
"env exists secureboot && esbc_halt;"
#endif
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index 31fcdae986b..5900b8f0e30 100644
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
*/
#ifndef __L1028A_COMMON_H
@@ -93,11 +93,6 @@
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
#define OCRAM_NONSECURE_SIZE 0x00010000
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 29a3790c457..65d63e2fc99 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015 Freescale Semiconductor
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
*/
#ifndef __LS1043A_COMMON_H
@@ -171,13 +171,6 @@
#endif
#endif
-/* MMC */
-#ifndef SPL_NO_MMC
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-#endif
-
/* DSPI */
#ifndef SPL_NO_DSPI
#ifdef CONFIG_FSL_DSPI
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 0c3978a922c..11e1a184c5e 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2016 Freescale Semiconductor
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
*/
#ifndef __LS1046A_COMMON_H
@@ -165,13 +165,6 @@
CONFIG_SYS_SCSI_MAX_LUN)
#endif
-/* MMC */
-#ifndef SPL_NO_MMC
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-#endif
-
/* FMan ucode */
#ifndef SPL_NO_FMAN
#define CONFIG_SYS_DPAA_FMAN
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 4d04833c50a..d032a3d1116 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2017, 2020 NXP
+ * Copyright 2017, 2020-2021 NXP
*/
#ifndef __LS1088A_QDS_H
@@ -361,7 +361,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_FSL_MEMAC
/* MMC */
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \
QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER)
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index 6f36dd417a9..5ade0eb439c 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2017, 2020 NXP
+ * Copyright 2017, 2020-2021 NXP
*/
#ifndef __LS1088A_RDB_H
@@ -507,11 +507,6 @@
#endif
#endif
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
#ifndef SPL_NO_ENV
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index b3fce1b7f79..41c1a86743a 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2017, 2019-2020 NXP
+ * Copyright 2017, 2019-2021 NXP
* Copyright 2015 Freescale Semiconductor
*/
@@ -318,11 +318,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_PCI_SCAN_SHOW
#endif
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
/* Initial environment variables */
#undef CONFIG_EXTRA_ENV_SETTINGS
#ifdef CONFIG_NXP_ESBC
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 8626a1d5e6f..f2dc495fbb9 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2017, 2019-2020 NXP
+ * Copyright 2017, 2019-2021 NXP
* Copyright 2015 Freescale Semiconductor
*/
@@ -300,11 +300,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_PCI_SCAN_SHOW
#endif
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 0) \
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 9f2b8999cdb..15ea0e4ce1f 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2021 NXP
*/
#ifndef __LX2_COMMON_H
@@ -129,11 +129,6 @@
#define CONFIG_PCI_SCAN_SHOW
#endif
-/* MMC */
-#ifdef CONFIG_MMC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
/* SATA */
#ifdef CONFIG_SCSI
diff --git a/include/configs/pg-wcom-expu1.h b/include/configs/pg-wcom-expu1.h
new file mode 100644
index 00000000000..e08d9414129
--- /dev/null
+++ b/include/configs/pg-wcom-expu1.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Hitachi ABB Power Grids
+ */
+
+#ifndef __CONFIG_PG_WCOM_EXPU1_H
+#define __CONFIG_PG_WCOM_EXPU1_H
+
+#define WCOM_EXPU1
+#define CONFIG_HOSTNAME "EXPU1"
+
+#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0"
+#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1"
+
+/* CLIPS FPGA Definitions */
+#define CONFIG_SYS_CSPR3_EXT (0x00)
+#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CLIPS_BASE) | \
+ CSPR_PORT_SIZE_8 | \
+ CSPR_MSEL_GPCM | \
+ CSPR_V)
+#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024)
+#define CONFIG_SYS_CSOR3 (CSOR_GPCM_ADM_SHIFT(0x4) | \
+ CSOR_GPCM_TRHZ_40)
+#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x6) | \
+ FTIM0_GPCM_TEADC(0x7) | \
+ FTIM0_GPCM_TEAHC(0x2))
+#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x2) | \
+ FTIM1_GPCM_TRAD(0x12))
+#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x3) | \
+ FTIM2_GPCM_TCH(0x1) | \
+ FTIM2_GPCM_TWP(0x12))
+#define CONFIG_SYS_CS3_FTIM3 0x04000000
+
+/* PRST */
+#define WCOM_CLIPS_RST 0
+#define WCOM_QSFP_RST 1
+#define WCOM_PHY_RST 2
+#define WCOM_TMG_RST 3
+#define KM_DBG_ETH_RST 15
+
+/* QRIO GPIOs used for deblocking */
+#define KM_I2C_DEBLOCK_PORT QRIO_GPIO_A
+#define KM_I2C_DEBLOCK_SCL 20
+#define KM_I2C_DEBLOCK_SDA 21
+
+/* ZL30343 on SPI */
+#define WCOM_ZL30343_CFG_ADDR 0xe8070000
+#define WCOM_ZL30343_SPI_BUS 0
+#define WCOM_ZL30343_CS 0
+
+#include "km/pg-wcom-ls102xa.h"
+
+#endif /* __CONFIG_PG_WCOM_EXPU1_H */
diff --git a/include/net/pfe_eth/pfe/pfe_hw.h b/include/net/pfe_eth/pfe/pfe_hw.h
index c69fc69130c..71e4115afa0 100644
--- a/include/net/pfe_eth/pfe/pfe_hw.h
+++ b/include/net/pfe_eth/pfe/pfe_hw.h
@@ -160,4 +160,10 @@ void hif_rx_enable(void);
void hif_rx_disable(void);
void hif_rx_desc_disable(void);
+#ifdef PFE_RESET_WA
+void pfe_command_stop(int argc, char *const argv[]);
+#else
+static void pfe_command_stop(int argc, char *const argv[]) {}
+#endif
+
#endif /* _PFE_H_ */
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-19 23:46:10 +0000